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authorChris Lattner <sabre@nondot.org>2008-01-08 18:05:21 +0000
committerChris Lattner <sabre@nondot.org>2008-01-08 18:05:21 +0000
commit76a64e2b9eb8fe79dafd0249064221943efcdfe5 (patch)
tree542679010194416ded3b980c89c35f255b63b43d /utils
parentdfd9458dce73f93166f8e24cfe5c9e331779b934 (diff)
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add a mayLoad property for machine instructions, a correlary to mayStore.
This is currently not set by anything. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45748 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
-rw-r--r--utils/TableGen/CodeGenInstruction.cpp1
-rw-r--r--utils/TableGen/CodeGenInstruction.h2
-rw-r--r--utils/TableGen/InstrInfoEmitter.cpp24
3 files changed, 14 insertions, 13 deletions
diff --git a/utils/TableGen/CodeGenInstruction.cpp b/utils/TableGen/CodeGenInstruction.cpp
index daab065..9778db3 100644
--- a/utils/TableGen/CodeGenInstruction.cpp
+++ b/utils/TableGen/CodeGenInstruction.cpp
@@ -84,6 +84,7 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
isBarrier = R->getValueAsBit("isBarrier");
isCall = R->getValueAsBit("isCall");
isSimpleLoad = R->getValueAsBit("isSimpleLoad");
+ mayLoad = R->getValueAsBit("mayLoad");
mayStore = R->getValueAsBit("mayStore");
isImplicitDef= R->getValueAsBit("isImplicitDef");
bool isTwoAddress = R->getValueAsBit("isTwoAddress");
diff --git a/utils/TableGen/CodeGenInstruction.h b/utils/TableGen/CodeGenInstruction.h
index 6f7a19e..f3cdbfe 100644
--- a/utils/TableGen/CodeGenInstruction.h
+++ b/utils/TableGen/CodeGenInstruction.h
@@ -90,7 +90,7 @@ namespace llvm {
bool isBarrier;
bool isCall;
bool isSimpleLoad;
- bool mayStore;
+ bool mayLoad, mayStore;
bool isImplicitDef;
bool isPredicable;
bool isConvertibleToThreeAddress;
diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp
index d357f33..1c1973f 100644
--- a/utils/TableGen/InstrInfoEmitter.cpp
+++ b/utils/TableGen/InstrInfoEmitter.cpp
@@ -144,12 +144,12 @@ void InstrInfoEmitter::EmitOperandInfo(std::ostream &OS,
class InstAnalyzer {
const CodeGenDAGPatterns &CDP;
bool &mayStore;
- bool &isLoad;
+ bool &mayLoad;
bool &NeverHasSideEffects;
public:
InstAnalyzer(const CodeGenDAGPatterns &cdp,
- bool &maystore, bool &isload, bool &nhse)
- : CDP(cdp), mayStore(maystore), isLoad(isload), NeverHasSideEffects(nhse) {
+ bool &maystore, bool &mayload, bool &nhse)
+ : CDP(cdp), mayStore(maystore), mayLoad(mayload), NeverHasSideEffects(nhse){
}
void Analyze(Record *InstRecord) {
@@ -166,9 +166,8 @@ public:
private:
void AnalyzeNode(const TreePatternNode *N) {
- if (N->isLeaf()) {
+ if (N->isLeaf())
return;
- }
if (N->getOperator()->getName() != "set") {
// Get information about the SDNode for the operator.
@@ -191,11 +190,11 @@ private:
};
void InstrInfoEmitter::InferFromPattern(const CodeGenInstruction &Inst,
- bool &mayStore, bool &isLoad,
+ bool &mayStore, bool &mayLoad,
bool &NeverHasSideEffects) {
- mayStore = isLoad = NeverHasSideEffects = false;
+ mayStore = mayLoad = NeverHasSideEffects = false;
- InstAnalyzer(CDP, mayStore, isLoad, NeverHasSideEffects).Analyze(Inst.TheDef);
+ InstAnalyzer(CDP, mayStore, mayLoad,NeverHasSideEffects).Analyze(Inst.TheDef);
// InstAnalyzer only correctly analyzes mayStore so far.
if (Inst.mayStore) { // If the .td file explicitly sets mayStore, use it.
@@ -210,7 +209,7 @@ void InstrInfoEmitter::InferFromPattern(const CodeGenInstruction &Inst,
}
// These two override everything.
- isLoad = Inst.isSimpleLoad;
+ mayLoad = Inst.mayLoad;
NeverHasSideEffects = Inst.neverHasSideEffects;
#if 0
@@ -281,8 +280,8 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
const OperandInfoMapTy &OpInfo,
std::ostream &OS) {
// Determine properties of the instruction from its pattern.
- bool mayStore, isSimpleLoad, NeverHasSideEffects;
- InferFromPattern(Inst, mayStore, isSimpleLoad, NeverHasSideEffects);
+ bool mayStore, mayLoad, NeverHasSideEffects;
+ InferFromPattern(Inst, mayStore, mayLoad, NeverHasSideEffects);
if (NeverHasSideEffects && Inst.mayHaveSideEffects) {
std::cerr << "error: Instruction '" << Inst.TheDef->getName()
@@ -308,7 +307,8 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num,
if (Inst.isBarrier) OS << "|(1<<TID::Barrier)";
if (Inst.hasDelaySlot) OS << "|(1<<TID::DelaySlot)";
if (Inst.isCall) OS << "|(1<<TID::Call)";
- if (isSimpleLoad) OS << "|(1<<TID::SimpleLoad)";
+ if (Inst.isSimpleLoad) OS << "|(1<<TID::SimpleLoad)";
+ if (mayLoad) OS << "|(1<<TID::MayLoad)";
if (mayStore) OS << "|(1<<TID::MayStore)";
if (Inst.isImplicitDef)OS << "|(1<<TID::ImplicitDef)";
if (Inst.isPredicable) OS << "|(1<<TID::Predicable)";