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| author | Dan Gohman <gohman@apple.com> | 2007-06-19 01:48:05 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2007-06-19 01:48:05 +0000 |
| commit | 82a87a01723c095176c6940bcc63d3a7c8007b4b (patch) | |
| tree | cb6bdf78002b48d594f2803783ba8c3d361d8a01 /utils | |
| parent | eaa91b0a1fc68984aae51f3c4b0cf29b38f89dac (diff) | |
| download | external_llvm-82a87a01723c095176c6940bcc63d3a7c8007b4b.zip external_llvm-82a87a01723c095176c6940bcc63d3a7c8007b4b.tar.gz external_llvm-82a87a01723c095176c6940bcc63d3a7c8007b4b.tar.bz2 | |
Replace M_REMATERIALIZIBLE and the newly-added isOtherReMaterializableLoad
with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37644 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
| -rw-r--r-- | utils/TableGen/CodeGenInstruction.h | 1 | ||||
| -rw-r--r-- | utils/TableGen/CodeGenTarget.cpp | 1 | ||||
| -rw-r--r-- | utils/TableGen/InstrInfoEmitter.cpp | 1 |
3 files changed, 0 insertions, 3 deletions
diff --git a/utils/TableGen/CodeGenInstruction.h b/utils/TableGen/CodeGenInstruction.h index 54d9b3f..4f76de8 100644 --- a/utils/TableGen/CodeGenInstruction.h +++ b/utils/TableGen/CodeGenInstruction.h @@ -91,7 +91,6 @@ namespace llvm { bool isConvertibleToThreeAddress; bool isCommutable; bool isTerminator; - bool isReMaterializable; bool hasDelaySlot; bool usesCustomDAGSchedInserter; bool hasVariableNumberOfOperands; diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp index c54ecd0..b02c423 100644 --- a/utils/TableGen/CodeGenTarget.cpp +++ b/utils/TableGen/CodeGenTarget.cpp @@ -365,7 +365,6 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr) isConvertibleToThreeAddress = R->getValueAsBit("isConvertibleToThreeAddress"); isCommutable = R->getValueAsBit("isCommutable"); isTerminator = R->getValueAsBit("isTerminator"); - isReMaterializable = R->getValueAsBit("isReMaterializable"); hasDelaySlot = R->getValueAsBit("hasDelaySlot"); usesCustomDAGSchedInserter = R->getValueAsBit("usesCustomDAGSchedInserter"); hasCtrlDep = R->getValueAsBit("hasCtrlDep"); diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp index af01e4c..bf027dd 100644 --- a/utils/TableGen/InstrInfoEmitter.cpp +++ b/utils/TableGen/InstrInfoEmitter.cpp @@ -240,7 +240,6 @@ void InstrInfoEmitter::emitRecord(const CodeGenInstruction &Inst, unsigned Num, if (Inst.isConvertibleToThreeAddress) OS << "|M_CONVERTIBLE_TO_3_ADDR"; if (Inst.isCommutable) OS << "|M_COMMUTABLE"; if (Inst.isTerminator) OS << "|M_TERMINATOR_FLAG"; - if (Inst.isReMaterializable) OS << "|M_REMATERIALIZIBLE"; if (Inst.clobbersPred) OS << "|M_CLOBBERS_PRED"; if (Inst.isNotDuplicable) OS << "|M_NOT_DUPLICABLE"; if (Inst.usesCustomDAGSchedInserter) |