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author | Christopher Lamb <christopher.lamb@gmail.com> | 2007-06-13 22:20:15 +0000 |
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committer | Christopher Lamb <christopher.lamb@gmail.com> | 2007-06-13 22:20:15 +0000 |
commit | a321125e8b7e50d427d86b8053de2e6793b5df5b (patch) | |
tree | 9ef185370d6e4cea7caf358df9426e5d7b673286 /utils | |
parent | 13e8b51e3ec014c5d7ae83afdf3b8fd29c3a461d (diff) | |
download | external_llvm-a321125e8b7e50d427d86b8053de2e6793b5df5b.zip external_llvm-a321125e8b7e50d427d86b8053de2e6793b5df5b.tar.gz external_llvm-a321125e8b7e50d427d86b8053de2e6793b5df5b.tar.bz2 |
Add support to tablegen for specifying subregister classes on a per register class basis.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37572 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
-rw-r--r-- | utils/TableGen/CodeGenRegisters.h | 1 | ||||
-rw-r--r-- | utils/TableGen/CodeGenTarget.cpp | 10 | ||||
-rw-r--r-- | utils/TableGen/RegisterInfoEmitter.cpp | 39 |
3 files changed, 50 insertions, 0 deletions
diff --git a/utils/TableGen/CodeGenRegisters.h b/utils/TableGen/CodeGenRegisters.h index 8e9008c..83c85b8 100644 --- a/utils/TableGen/CodeGenRegisters.h +++ b/utils/TableGen/CodeGenRegisters.h @@ -38,6 +38,7 @@ namespace llvm { std::vector<MVT::ValueType> VTs; unsigned SpillSize; unsigned SpillAlignment; + std::vector<Record*> SubRegClasses; std::string MethodProtos, MethodBodies; const std::string &getName() const; diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp index 17cea6f..c3c1ac22 100644 --- a/utils/TableGen/CodeGenTarget.cpp +++ b/utils/TableGen/CodeGenTarget.cpp @@ -199,6 +199,16 @@ CodeGenRegisterClass::CodeGenRegisterClass(Record *R) : TheDef(R) { Elements.push_back(Reg); } + std::vector<Record*> SubRegClassList = + R->getValueAsListOfDefs("SubRegClassList"); + for (unsigned i = 0, e = SubRegClassList.size(); i != e; ++i) { + Record *SubRegClass = SubRegClassList[i]; + if (!SubRegClass->isSubClassOf("RegisterClass")) + throw "Register Class member '" + SubRegClass->getName() + + "' does not derive from the RegisterClass class!"; + SubRegClasses.push_back(SubRegClass); + } + // Allow targets to override the size in bits of the RegisterClass. unsigned Size = R->getValueAsInt("Size"); diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp index 5fbd013..a2269a8 100644 --- a/utils/TableGen/RegisterInfoEmitter.cpp +++ b/utils/TableGen/RegisterInfoEmitter.cpp @@ -224,6 +224,44 @@ void RegisterInfoEmitter::run(std::ostream &OS) { std::map<unsigned, std::set<unsigned> > SuperClassMap; OS << "\n"; + + + // Emit the sub-register classes for each RegisterClass + for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) { + const CodeGenRegisterClass &RC = RegisterClasses[rc]; + + // Give the register class a legal C name if it's anonymous. + std::string Name = RC.TheDef->getName(); + + OS << " // " << Name + << " Sub-register Classess...\n" + << " static const TargetRegisterClass* const " + << Name << "SubRegClasses [] = {\n "; + + bool Empty = true; + + for (unsigned subrc = 0, e2 = RC.SubRegClasses.size(); + subrc != e2; ++subrc) { + unsigned rc2 = 0, e2 = RegisterClasses.size(); + for (; rc2 != e2; ++rc2) { + const CodeGenRegisterClass &RC2 = RegisterClasses[rc2]; + if (RC.SubRegClasses[subrc]->getName() == RC2.getName()) { + if (!Empty) OS << ", "; + OS << "&" << getQualifiedName(RC2.TheDef) << "RegClass"; + Empty = false; + break; + } + } + if (rc2 == e2) + throw "Register Class member '" + + RC.SubRegClasses[subrc]->getName() + + "' is not a valid RegisterClass!"; + } + + OS << (!Empty ? ", " : "") << "NULL"; + OS << "\n };\n\n"; + } + // Emit the sub-classes array for each RegisterClass for (unsigned rc = 0, e = RegisterClasses.size(); rc != e; ++rc) { const CodeGenRegisterClass &RC = RegisterClasses[rc]; @@ -304,6 +342,7 @@ void RegisterInfoEmitter::run(std::ostream &OS) { << RC.getName() + "VTs" << ", " << RC.getName() + "Subclasses" << ", " << RC.getName() + "Superclasses" << ", " + << RC.getName() + "SubRegClasses" << ", " << RC.SpillSize/8 << ", " << RC.SpillAlignment/8 << ", " << RC.getName() << ", " << RC.getName() << " + " << RC.Elements.size() << ") {}\n"; |