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authorJim Grosbach <grosbach@apple.com>2012-04-18 18:39:31 +0000
committerJim Grosbach <grosbach@apple.com>2012-04-18 18:39:31 +0000
commitbfb4327baa5bbab78f0da4c8c069482878660a04 (patch)
treeea79e17f66c74f8bb16ef0c7e8fed724b5662629 /utils
parent37c53ff6a715b2f9efcfa5253b2774b31301b6f8 (diff)
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Move a few more warnings to use PrintWarning().
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155027 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'utils')
-rw-r--r--utils/TableGen/CodeGenRegisters.cpp10
-rw-r--r--utils/TableGen/RegisterInfoEmitter.cpp6
2 files changed, 9 insertions, 7 deletions
diff --git a/utils/TableGen/CodeGenRegisters.cpp b/utils/TableGen/CodeGenRegisters.cpp
index 7ce4f87..85e33b1 100644
--- a/utils/TableGen/CodeGenRegisters.cpp
+++ b/utils/TableGen/CodeGenRegisters.cpp
@@ -19,6 +19,7 @@
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/StringExtras.h"
+#include "llvm/ADT/Twine.h"
using namespace llvm;
@@ -896,11 +897,10 @@ void CodeGenRegBank::computeComposites() {
if (i1d->second == Reg3) {
// Conflicting composition? Emit a warning but allow it.
if (CodeGenSubRegIndex *Prev = Idx1->addComposite(Idx2, i1d->first))
- errs() << "Warning: SubRegIndex " << Idx1->getQualifiedName()
- << " and " << Idx2->getQualifiedName()
- << " compose ambiguously as "
- << Prev->getQualifiedName() << " or "
- << i1d->first->getQualifiedName() << "\n";
+ PrintWarning(Twine("SubRegIndex") + Idx1->getQualifiedName() +
+ " and " + Idx2->getQualifiedName() +
+ " compose ambiguously as " + Prev->getQualifiedName() +
+ " or " + i1d->first->getQualifiedName() +"\n");
}
}
}
diff --git a/utils/TableGen/RegisterInfoEmitter.cpp b/utils/TableGen/RegisterInfoEmitter.cpp
index 21e9e99..748ffc5 100644
--- a/utils/TableGen/RegisterInfoEmitter.cpp
+++ b/utils/TableGen/RegisterInfoEmitter.cpp
@@ -17,10 +17,12 @@
#include "CodeGenTarget.h"
#include "CodeGenRegisters.h"
#include "SequenceToOffsetTable.h"
+#include "llvm/TableGen/Error.h"
#include "llvm/TableGen/Record.h"
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/STLExtras.h"
+#include "llvm/ADT/Twine.h"
#include "llvm/Support/Format.h"
#include <algorithm>
#include <set>
@@ -207,8 +209,8 @@ RegisterInfoEmitter::EmitRegMappingTables(raw_ostream &OS,
std::vector<int64_t> RegNums = Reg->getValueAsListOfInts("DwarfNumbers");
maxLength = std::max((size_t)maxLength, RegNums.size());
if (DwarfRegNums.count(Reg))
- errs() << "Warning: DWARF numbers for register " << getQualifiedName(Reg)
- << "specified multiple times\n";
+ PrintWarning(Reg->getLoc(), Twine("DWARF numbers for register ") +
+ getQualifiedName(Reg) + "specified multiple times\n");
DwarfRegNums[Reg] = RegNums;
}