diff options
| -rw-r--r-- | include/llvm/IntrinsicsPowerPC.td | 9 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrFormats.td | 17 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCInstrInfo.td | 8 |
3 files changed, 34 insertions, 0 deletions
diff --git a/include/llvm/IntrinsicsPowerPC.td b/include/llvm/IntrinsicsPowerPC.td index f344f3e..2d128aa 100644 --- a/include/llvm/IntrinsicsPowerPC.td +++ b/include/llvm/IntrinsicsPowerPC.td @@ -15,6 +15,15 @@ // Definitions for all PowerPC intrinsics. // +// Non-altivec intrinsics. +let TargetPrefix = "ppc" in { // All intrinsics start with "llvm.ppc.". + // dcbz instruction. + def int_ppc_dcbz : Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>; + // dcbzl (PPC970) instruction. + def int_ppc_dcbzl : Intrinsic<[llvm_void_ty, llvm_ptr_ty], [IntrWriteMem]>; +} + + let TargetPrefix = "ppc" in { // All PPC intrinsics start with "llvm.ppc.". /// PowerPC_Vec_Intrinsic - Base class for all altivec intrinsics. class PowerPC_Vec_Intrinsic<string GCCIntSuffix, list<LLVMType> types, diff --git a/lib/Target/PowerPC/PPCInstrFormats.td b/lib/Target/PowerPC/PPCInstrFormats.td index 10ac79b..bb0ccf8 100644 --- a/lib/Target/PowerPC/PPCInstrFormats.td +++ b/lib/Target/PowerPC/PPCInstrFormats.td @@ -325,6 +325,23 @@ class XForm_28<bits<6> opcode, bits<10> xo, dag OL, string asmstr, : XForm_base_r3xo<opcode, xo, OL, asmstr, itin, pattern> { } +// DCB_Form - Form X instruction, used for dcb* instructions. +class DCB_Form<bits<10> xo, bits<5> immfield, dag OL, string asmstr, + InstrItinClass itin, list<dag> pattern> + : I<31, OL, asmstr, itin> { + bits<5> A; + bits<5> B; + + let Pattern = pattern; + + let Inst{6-10} = immfield; + let Inst{11-15} = A; + let Inst{16-20} = B; + let Inst{21-30} = xo; + let Inst{31} = 0; +} + + // DSS_Form - Form X instruction, used for altivec dss* instructions. class DSS_Form<bits<10> xo, dag OL, string asmstr, InstrItinClass itin, list<dag> pattern> diff --git a/lib/Target/PowerPC/PPCInstrInfo.td b/lib/Target/PowerPC/PPCInstrInfo.td index d75c794..c93e0d4 100644 --- a/lib/Target/PowerPC/PPCInstrInfo.td +++ b/lib/Target/PowerPC/PPCInstrInfo.td @@ -318,6 +318,14 @@ let isCall = 1, noResults = 1, PPC970_Unit = 7, [(PPCbctrl)]>; } +// DCB* instructions. +def DCBZ : DCB_Form<1014, 0, (ops memrr:$dst), + "dcbz $dst", LdStDCBF, [(int_ppc_dcbz xoaddr:$dst)]>, + PPC970_DGroup_Single; +def DCBZL : DCB_Form<1014, 1, (ops memrr:$dst), + "dcbzl $dst", LdStDCBF, [(int_ppc_dcbzl xoaddr:$dst)]>, + PPC970_DGroup_Single; + // D-Form instructions. Most instructions that perform an operation on a // register and an immediate are of this type. // |