diff options
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 2 | ||||
| -rw-r--r-- | test/CodeGen/X86/byval-memcpy.ll | 10 | ||||
| -rw-r--r-- | test/CodeGen/X86/byval2.ll | 4 | ||||
| -rw-r--r-- | test/CodeGen/X86/byval3.ll | 4 | ||||
| -rw-r--r-- | test/CodeGen/X86/byval4.ll | 4 | ||||
| -rw-r--r-- | test/CodeGen/X86/byval5.ll | 4 | ||||
| -rw-r--r-- | test/CodeGen/X86/byval7.ll | 6 | ||||
| -rw-r--r-- | test/CodeGen/X86/tailcallbyval64.ll | 2 |
8 files changed, 14 insertions, 22 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 38746b0..9ce0046 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -1564,7 +1564,7 @@ CreateCopyOfByValArgument(SDValue Src, SDValue Dst, SDValue Chain, SDValue SizeNode = DAG.getConstant(Flags.getByValSize(), MVT::i32); return DAG.getMemcpy(Chain, dl, Dst, Src, SizeNode, Flags.getByValAlign(), - /*isVolatile*/false, /*AlwaysInline=*/false, + /*isVolatile*/false, /*AlwaysInline=*/true, MachinePointerInfo(), MachinePointerInfo()); } diff --git a/test/CodeGen/X86/byval-memcpy.ll b/test/CodeGen/X86/byval-memcpy.ll deleted file mode 100644 index a1eee45..0000000 --- a/test/CodeGen/X86/byval-memcpy.ll +++ /dev/null @@ -1,10 +0,0 @@ -; RUN: llc < %s -march=x86-64 | FileCheck %s -; RUN: llc < %s -march=x86 | FileCheck %s -; CHECK: memcpy -define void @foo([40000 x i32] *%P) nounwind { - call void @bar([40000 x i32] * byval align 1 %P) - ret void -} - -declare void @bar([40000 x i32] *%P ) - diff --git a/test/CodeGen/X86/byval2.ll b/test/CodeGen/X86/byval2.ll index 0b6dfc9..71129f5 100644 --- a/test/CodeGen/X86/byval2.ll +++ b/test/CodeGen/X86/byval2.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86-64 | egrep {rep.movsq|memcpy} | count 2 -; RUN: llc < %s -march=x86 | egrep {rep.movsl|memcpy} | count 2 +; RUN: llc < %s -march=x86-64 | grep rep.movsq | count 2 +; RUN: llc < %s -march=x86 | grep rep.movsl | count 2 %struct.s = type { i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, i64, diff --git a/test/CodeGen/X86/byval3.ll b/test/CodeGen/X86/byval3.ll index 29cb41c..504e0be 100644 --- a/test/CodeGen/X86/byval3.ll +++ b/test/CodeGen/X86/byval3.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86-64 | egrep {rep.movsq|memcpy} | count 2 -; RUN: llc < %s -march=x86 | egrep {rep.movsl|memcpy} | count 2 +; RUN: llc < %s -march=x86-64 | grep rep.movsq | count 2 +; RUN: llc < %s -march=x86 | grep rep.movsl | count 2 %struct.s = type { i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, diff --git a/test/CodeGen/X86/byval4.ll b/test/CodeGen/X86/byval4.ll index bd745f0..4db9d65 100644 --- a/test/CodeGen/X86/byval4.ll +++ b/test/CodeGen/X86/byval4.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86-64 | egrep {rep.movsq|memcpy} | count 2 -; RUN: llc < %s -march=x86 | egrep {rep.movsl|memcpy} | count 2 +; RUN: llc < %s -march=x86-64 | grep rep.movsq | count 2 +; RUN: llc < %s -march=x86 | grep rep.movsl | count 2 %struct.s = type { i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, i16, diff --git a/test/CodeGen/X86/byval5.ll b/test/CodeGen/X86/byval5.ll index c13de4b..69c115b 100644 --- a/test/CodeGen/X86/byval5.ll +++ b/test/CodeGen/X86/byval5.ll @@ -1,5 +1,5 @@ -; RUN: llc < %s -march=x86-64 | egrep {rep.movsq|memcpy} | count 2 -; RUN: llc < %s -march=x86 | egrep {rep.movsl|memcpy} | count 2 +; RUN: llc < %s -march=x86-64 | grep rep.movsq | count 2 +; RUN: llc < %s -march=x86 | grep rep.movsl | count 2 %struct.s = type { i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, i8, diff --git a/test/CodeGen/X86/byval7.ll b/test/CodeGen/X86/byval7.ll index 8e3aa0b..686ed9c 100644 --- a/test/CodeGen/X86/byval7.ll +++ b/test/CodeGen/X86/byval7.ll @@ -8,8 +8,10 @@ define i32 @main() nounwind { entry: ; CHECK: main: ; CHECK: movl $1, (%esp) -; CHECK: movl ${{36|144}}, -; CHECK: {{rep;movsl|memcpy}} +; CHECK: leal 16(%esp), %edi +; CHECK: movl $36, %ecx +; CHECK: leal 160(%esp), %esi +; CHECK: rep;movsl %s = alloca %struct.S ; <%struct.S*> [#uses=2] %tmp15 = getelementptr %struct.S* %s, i32 0, i32 0 ; <<2 x i64>*> [#uses=1] store <2 x i64> < i64 8589934595, i64 1 >, <2 x i64>* %tmp15, align 16 diff --git a/test/CodeGen/X86/tailcallbyval64.ll b/test/CodeGen/X86/tailcallbyval64.ll index b4a2e02..7c685b8 100644 --- a/test/CodeGen/X86/tailcallbyval64.ll +++ b/test/CodeGen/X86/tailcallbyval64.ll @@ -1,6 +1,6 @@ ; RUN: llc < %s -march=x86-64 -tailcallopt | grep TAILCALL ; Expect 2 rep;movs because of tail call byval lowering. -; RUN: llc < %s -march=x86-64 -tailcallopt | egrep {rep|memcpy} | wc -l | grep 2 +; RUN: llc < %s -march=x86-64 -tailcallopt | grep rep | wc -l | grep 2 ; A sequence of copyto/copyfrom virtual registers is used to deal with byval ; lowering appearing after moving arguments to registers. The following two ; checks verify that the register allocator changes those sequences to direct |