aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
Diffstat
-rw-r--r--lib/Target/X86/X86ATTAsmPrinter.cpp17
-rw-r--r--lib/Target/X86/X86CodeEmitter.cpp37
-rw-r--r--lib/Target/X86/X86ISelDAGToDAG.cpp14
-rw-r--r--lib/Target/X86/X86InstrInfo.td6
-rw-r--r--lib/Target/X86/X86MachineFunctionInfo.h16
5 files changed, 49 insertions, 41 deletions
diff --git a/lib/Target/X86/X86ATTAsmPrinter.cpp b/lib/Target/X86/X86ATTAsmPrinter.cpp
index d2112b4..5b64501 100644
--- a/lib/Target/X86/X86ATTAsmPrinter.cpp
+++ b/lib/Target/X86/X86ATTAsmPrinter.cpp
@@ -32,14 +32,14 @@ using namespace llvm;
STATISTIC(EmittedInsts, "Number of machine instrs printed");
-static std::string computePICLabel(unsigned FnNum,
- const TargetAsmInfo *TAI,
- const X86Subtarget* Subtarget) {
+static std::string getPICLabelString(unsigned FnNum,
+ const TargetAsmInfo *TAI,
+ const X86Subtarget* Subtarget) {
std::string label;
if (Subtarget->isTargetDarwin())
label = "\"L" + utostr_32(FnNum) + "$pb\"";
else if (Subtarget->isTargetELF())
- label = ".Lllvm$" + utostr_32(FnNum) + "$piclabel";
+ label = ".Lllvm$" + utostr_32(FnNum) + "." + "$piclabel";
else
assert(0 && "Don't know how to print PIC label!\n");
@@ -318,8 +318,7 @@ void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
}
if (!isCallOp && TM.getRelocationModel() == Reloc::PIC_)
- O << "-\"" << TAI->getPrivateGlobalPrefix() << getFunctionNumber()
- << "$pb\"";
+ O << '-' << getPICLabelString(getFunctionNumber(), TAI, Subtarget);
} else {
if (GV->hasDLLImportLinkage()) {
O << "__imp_";
@@ -420,7 +419,7 @@ void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
// popl %some_register
// addl $_GLOBAL_ADDRESS_TABLE_ + [.-piclabel], %some_register
O << " + [.-"
- << computePICLabel(getFunctionNumber(), TAI, Subtarget) << "]";
+ << getPICLabelString(getFunctionNumber(), TAI, Subtarget) << "]";
if (isCallOp)
O << "@PLT";
@@ -515,11 +514,11 @@ void X86ATTAsmPrinter::printPICJumpTableSetLabel(unsigned uid,
O << '-' << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
<< '_' << uid << '\n';
else
- O << '-' << computePICLabel(getFunctionNumber(), TAI, Subtarget) << '\n';
+ O << '-' << getPICLabelString(getFunctionNumber(), TAI, Subtarget) << '\n';
}
void X86ATTAsmPrinter::printPICLabel(const MachineInstr *MI, unsigned Op) {
- std::string label = computePICLabel(getFunctionNumber(), TAI, Subtarget);
+ std::string label = getPICLabelString(getFunctionNumber(), TAI, Subtarget);
O << label << "\n" << label << ":";
}
diff --git a/lib/Target/X86/X86CodeEmitter.cpp b/lib/Target/X86/X86CodeEmitter.cpp
index 24d75b6..d531fd5 100644
--- a/lib/Target/X86/X86CodeEmitter.cpp
+++ b/lib/Target/X86/X86CodeEmitter.cpp
@@ -58,7 +58,8 @@ namespace {
return "X86 Machine Code Emitter";
}
- void emitInstruction(const MachineInstr &MI);
+ void emitInstruction(const MachineInstr &MI,
+ const TargetInstrDescriptor *Desc);
private:
void emitPCRelativeBlockAddress(MachineBasicBlock *MBB);
@@ -112,8 +113,14 @@ bool Emitter::runOnMachineFunction(MachineFunction &MF) {
MBB != E; ++MBB) {
MCE.StartMachineBasicBlock(MBB);
for (MachineBasicBlock::const_iterator I = MBB->begin(), E = MBB->end();
- I != E; ++I)
- emitInstruction(*I);
+ I != E; ++I) {
+ const TargetInstrDescriptor *Desc = I->getInstrDescriptor();
+ emitInstruction(*I, Desc);
+ // MOVPC32r is basically a call plus a pop instruction.
+ if (Desc->Opcode == X86::MOVPC32r)
+ emitInstruction(*I, &II->get(X86::POP32r));
+ NumEmitted++; // Keep track of the # of mi's emitted
+ }
}
} while (MCE.finishFunction(MF));
@@ -519,10 +526,8 @@ unsigned Emitter::determineREX(const MachineInstr &MI) {
return REX;
}
-void Emitter::emitInstruction(const MachineInstr &MI) {
- NumEmitted++; // Keep track of the # of mi's emitted
-
- const TargetInstrDescriptor *Desc = MI.getInstrDescriptor();
+void Emitter::emitInstruction(const MachineInstr &MI,
+ const TargetInstrDescriptor *Desc) {
unsigned Opcode = Desc->Opcode;
// Emit the repeat opcode prefix as needed.
@@ -587,8 +592,10 @@ void Emitter::emitInstruction(const MachineInstr &MI) {
switch (Desc->TSFlags & X86II::FormMask) {
default: assert(0 && "Unknown FormMask value in X86 MachineCodeEmitter!");
case X86II::Pseudo:
-#ifndef NDEBUG
+ // Remember the current PC offset, this is the PIC relocation
+ // base address.
switch (Opcode) {
+#ifndef NDEBUG
default:
assert(0 && "psuedo instructions should be removed before code emission");
case TargetInstrInfo::INLINEASM:
@@ -607,13 +614,20 @@ void Emitter::emitInstruction(const MachineInstr &MI) {
case X86::IMPLICIT_DEF_VR128:
case X86::FP_REG_KILL:
break;
- }
#endif
+ case X86::MOVPC32r:
+ // This emits the "call" portion of this pseudo instruction.
+ MCE.emitByte(BaseOpcode);
+ emitConstant(0, sizeOfImm(Desc));
+ PICBase = MCE.getCurrentPCOffset();
+ break;
+ }
CurOp = NumOps;
break;
case X86II::RawFrm:
MCE.emitByte(BaseOpcode);
+
if (CurOp != NumOps) {
const MachineOperand &MO = MI.getOperand(CurOp++);
if (MO.isMachineBasicBlock()) {
@@ -631,11 +645,6 @@ void Emitter::emitInstruction(const MachineInstr &MI) {
assert(0 && "Unknown RawFrm operand!");
}
}
-
- // Remember the current PC offset, this is the PIC relocation
- // base address.
- if (Opcode == X86::MovePCtoStack)
- PICBase = MCE.getCurrentPCOffset();
break;
case X86II::AddRegFrm:
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp
index 8c5cd48..bc2870e 100644
--- a/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -16,6 +16,7 @@
#include "X86.h"
#include "X86InstrBuilder.h"
#include "X86ISelLowering.h"
+#include "X86MachineFunctionInfo.h"
#include "X86RegisterInfo.h"
#include "X86Subtarget.h"
#include "X86TargetMachine.h"
@@ -988,25 +989,24 @@ SDNode *X86DAGToDAGISel::getGlobalBaseReg() {
assert(!Subtarget->is64Bit() && "X86-64 PIC uses RIP relative addressing");
if (!GlobalBaseReg) {
// Insert the set of GlobalBaseReg into the first MBB of the function
- MachineBasicBlock &FirstMBB = BB->getParent()->front();
+ MachineFunction *MF = BB->getParent();
+ MachineBasicBlock &FirstMBB = MF->front();
MachineBasicBlock::iterator MBBI = FirstMBB.begin();
- MachineRegisterInfo &RegInfo = BB->getParent()->getRegInfo();
+ MachineRegisterInfo &RegInfo = MF->getRegInfo();
unsigned PC = RegInfo.createVirtualRegister(X86::GR32RegisterClass);
const TargetInstrInfo *TII = TM.getInstrInfo();
// Operand of MovePCtoStack is completely ignored by asm printer. It's
// only used in JIT code emission as displacement to pc.
- BuildMI(FirstMBB, MBBI, TII->get(X86::MovePCtoStack)).addImm(0);
- BuildMI(FirstMBB, MBBI, TII->get(X86::POP32r), PC);
+ BuildMI(FirstMBB, MBBI, TII->get(X86::MOVPC32r), PC).addImm(0);
// If we're using vanilla 'GOT' PIC style, we should use relative addressing
// not to pc, but to _GLOBAL_ADDRESS_TABLE_ external
if (TM.getRelocationModel() == Reloc::PIC_ &&
Subtarget->isPICStyleGOT()) {
GlobalBaseReg = RegInfo.createVirtualRegister(X86::GR32RegisterClass);
- BuildMI(FirstMBB, MBBI, TII->get(X86::ADD32ri), GlobalBaseReg).
- addReg(PC).
- addExternalSymbol("_GLOBAL_OFFSET_TABLE_");
+ BuildMI(FirstMBB, MBBI, TII->get(X86::ADD32ri), GlobalBaseReg)
+ .addReg(PC).addExternalSymbol("_GLOBAL_OFFSET_TABLE_");
} else {
GlobalBaseReg = PC;
}
diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td
index 56a4b0a..9bd30fe 100644
--- a/lib/Target/X86/X86InstrInfo.td
+++ b/lib/Target/X86/X86InstrInfo.td
@@ -281,6 +281,9 @@ def IMPLICIT_DEF_GR32 : I<0, Pseudo, (outs GR32:$dst), (ins),
// Nop
def NOOP : I<0x90, RawFrm, (outs), (ins), "nop", []>;
+// PIC base
+def MOVPC32r : Ii32<0xE8, Pseudo, (outs GR32:$reg), (ins piclabel:$label),
+ "call\t$label\n\tpop{l}\t$reg", []>;
//===----------------------------------------------------------------------===//
// Control Flow Instructions...
@@ -408,9 +411,6 @@ def POPFD : I<0x9D, RawFrm, (outs), (ins), "popf", []>;
let Defs = [ESP], Uses = [ESP, EFLAGS] in
def PUSHFD : I<0x9C, RawFrm, (outs), (ins), "pushf", []>;
-def MovePCtoStack : Ii32<0xE8, RawFrm, (outs), (ins piclabel:$label),
- "call\t$label", []>;
-
let isTwoAddress = 1 in // GR32 = bswap GR32
def BSWAP32r : I<0xC8, AddRegFrm,
(outs GR32:$dst), (ins GR32:$src),
diff --git a/lib/Target/X86/X86MachineFunctionInfo.h b/lib/Target/X86/X86MachineFunctionInfo.h
index 7b043e9..fcdeb05 100644
--- a/lib/Target/X86/X86MachineFunctionInfo.h
+++ b/lib/Target/X86/X86MachineFunctionInfo.h
@@ -37,20 +37,20 @@ class X86MachineFunctionInfo : public MachineFunctionInfo {
/// stack frame in bytes.
unsigned CalleeSavedFrameSize;
- /// BytesToPopOnReturn - amount of bytes function pops on return.
+ /// BytesToPopOnReturn - Number of bytes function pops on return.
/// Used on windows platform for stdcall & fastcall name decoration
unsigned BytesToPopOnReturn;
- /// If the function requires additional name decoration, DecorationStyle holds
- /// the right way to do so.
+ /// DecorationStyle - If the function requires additional name decoration,
+ /// DecorationStyle holds the right way to do so.
NameDecorationStyle DecorationStyle;
- // FrameIndex for return slot.
+ /// ReturnAddrIndex - FrameIndex for return slot.
int ReturnAddrIndex;
- // Delta the ReturnAddr stack slot is moved
- // Used for creating an area before the register spill area on the stack
- // the returnaddr can be savely move to this area
+ /// TailCallReturnAddrDelta - Delta the ReturnAddr stack slot is moved
+ /// Used for creating an area before the register spill area on the stack
+ /// the returnaddr can be savely move to this area
int TailCallReturnAddrDelta;
public:
@@ -59,7 +59,7 @@ public:
BytesToPopOnReturn(0),
DecorationStyle(None),
ReturnAddrIndex(0),
- TailCallReturnAddrDelta(0){}
+ TailCallReturnAddrDelta(0) {}
X86MachineFunctionInfo(MachineFunction &MF) : ForceFramePointer(false),
CalleeSavedFrameSize(0),
generated by cgit v1.1 at 2025-01-15 05:56:29 +0000