diff options
-rw-r--r-- | include/llvm/Intrinsics.td | 5 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 4 |
2 files changed, 7 insertions, 2 deletions
diff --git a/include/llvm/Intrinsics.td b/include/llvm/Intrinsics.td index 444f514..42c16c3 100644 --- a/include/llvm/Intrinsics.td +++ b/include/llvm/Intrinsics.td @@ -197,12 +197,13 @@ def int_gcwrite : Intrinsic<[], def int_returnaddress : Intrinsic<[llvm_ptr_ty], [llvm_i32_ty], [IntrNoMem]>; def int_frameaddress : Intrinsic<[llvm_ptr_ty], [llvm_i32_ty], [IntrNoMem]>; -// Note: we treat stacksave/stackrestore as writemem because we don't otherwise -// model their dependencies on allocas. +// Note: we treat stacksave/stackrestore and stackaddr as writemem because we +// don't otherwise model their dependencies on allocas. def int_stacksave : Intrinsic<[llvm_ptr_ty]>, GCCBuiltin<"__builtin_stack_save">; def int_stackrestore : Intrinsic<[], [llvm_ptr_ty]>, GCCBuiltin<"__builtin_stack_restore">; +def int_stackaddress : Intrinsic<[llvm_ptr_ty], []>; // IntrWriteArgMem is more pessimistic than strictly necessary for prefetch, // however it does conveniently prevent the prefetch from being reordered diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index fbe601f..a0cd232 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -3756,6 +3756,10 @@ SelectionDAGBuilder::visitIntrinsicCall(const CallInst &I, unsigned Intrinsic) { setValue(&I, DAG.getNode(ISD::FRAMEADDR, dl, TLI.getPointerTy(), getValue(I.getOperand(1)))); return 0; + case Intrinsic::stackaddress: + setValue(&I, DAG.getNode(ISD::STACKADDR, dl, TLI.getPointerTy(), getRoot(), + getValue(I.getOperand(1)))); + return 0; case Intrinsic::setjmp: return "_setjmp"+!TLI.usesUnderscoreSetJmp(); case Intrinsic::longjmp: |