diff options
| -rw-r--r-- | lib/Target/X86/X86ISelDAGToDAG.cpp | 8 | ||||
| -rw-r--r-- | test/CodeGen/X86/movgs.ll | 31 |
2 files changed, 36 insertions, 3 deletions
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp index 0e650c0..ad51541 100644 --- a/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -403,6 +403,12 @@ static bool isCalleeLoad(SDValue Callee, SDValue &Chain, bool HasCallSeq) { LD->getExtensionType() != ISD::NON_EXTLOAD) return false; + // FIXME: Calls can't fold loads through segment registers yet. + if (const Value *Src = LD->getSrcValue()) + if (const PointerType *PT = dyn_cast<PointerType>(Src->getType())) + if (PT->getAddressSpace() >= 256) + return false; + // Now let's find the callseq_start. while (HasCallSeq && Chain.getOpcode() != ISD::CALLSEQ_START) { if (!Chain.hasOneUse()) @@ -563,7 +569,7 @@ bool X86DAGToDAGISel::MatchLoad(SDValue N, X86ISelAddressMode &AM) { SDValue Address = N.getOperand(1); if (Address.getOpcode() == X86ISD::SegmentBaseAddress && - !MatchSegmentBaseAddress (Address, AM)) + !MatchSegmentBaseAddress(Address, AM)) return false; return true; diff --git a/test/CodeGen/X86/movgs.ll b/test/CodeGen/X86/movgs.ll index b04048b..ed201f3 100644 --- a/test/CodeGen/X86/movgs.ll +++ b/test/CodeGen/X86/movgs.ll @@ -1,8 +1,35 @@ -; RUN: llc < %s -march=x86 | grep gs +; RUN: llc < %s -march=x86 | FileCheck %s --check-prefix=X32 +; RUN: llc < %s -march=x86-64 | FileCheck %s --check-prefix=X64 -define i32 @foo() nounwind readonly { +define i32 @test1() nounwind readonly { entry: %tmp = load i32* addrspace(256)* getelementptr (i32* addrspace(256)* inttoptr (i32 72 to i32* addrspace(256)*), i32 31) ; <i32*> [#uses=1] %tmp1 = load i32* %tmp ; <i32> [#uses=1] ret i32 %tmp1 } +; X32: test1: +; X32: movl %gs:196, %eax +; X32: movl (%eax), %eax +; X32: ret + +; X64: test1: +; X64: movq %gs:320, %rax +; X64: movl (%rax), %eax +; X64: ret + +define i64 @test2(void (i8*)* addrspace(256)* %tmp8) nounwind { +entry: + %tmp9 = load void (i8*)* addrspace(256)* %tmp8, align 8 + tail call void %tmp9(i8* undef) nounwind optsize + ret i64 0 +} + +; rdar://8453210 +; X32: test2: +; X32: movl %gs:(%eax), %eax +; X32: movl %eax, (%esp) +; X32: call *%eax + +; X64: test2: +; X64: movq %gs:(%rdi), %rax +; X64: callq *%rax |