diff options
| -rw-r--r-- | lib/CodeGen/TwoAddressInstructionPass.cpp | 17 | ||||
| -rw-r--r-- | test/CodeGen/X86/2009-11-18-TwoAddrKill.ll | 29 |
2 files changed, 34 insertions, 12 deletions
diff --git a/lib/CodeGen/TwoAddressInstructionPass.cpp b/lib/CodeGen/TwoAddressInstructionPass.cpp index 84467ed..5fa690b 100644 --- a/lib/CodeGen/TwoAddressInstructionPass.cpp +++ b/lib/CodeGen/TwoAddressInstructionPass.cpp @@ -112,8 +112,7 @@ namespace { MachineBasicBlock *MBB, unsigned Dist); bool DeleteUnusedInstr(MachineBasicBlock::iterator &mi, MachineBasicBlock::iterator &nmi, - MachineFunction::iterator &mbbi, - unsigned regB, unsigned regBIdx, unsigned Dist); + MachineFunction::iterator &mbbi, unsigned Dist); bool TryInstructionTransform(MachineBasicBlock::iterator &mi, MachineBasicBlock::iterator &nmi, @@ -730,7 +729,7 @@ void TwoAddressInstructionPass::ProcessCopy(MachineInstr *MI, /// isSafeToDelete - If the specified instruction does not produce any side /// effects and all of its defs are dead, then it's safe to delete. -static bool isSafeToDelete(MachineInstr *MI, unsigned Reg, +static bool isSafeToDelete(MachineInstr *MI, const TargetInstrInfo *TII, SmallVector<unsigned, 4> &Kills) { const TargetInstrDesc &TID = MI->getDesc(); @@ -745,10 +744,9 @@ static bool isSafeToDelete(MachineInstr *MI, unsigned Reg, continue; if (MO.isDef() && !MO.isDead()) return false; - if (MO.isUse() && MO.getReg() != Reg && MO.isKill()) + if (MO.isUse() && MO.isKill()) Kills.push_back(MO.getReg()); } - return true; } @@ -783,11 +781,10 @@ bool TwoAddressInstructionPass::DeleteUnusedInstr(MachineBasicBlock::iterator &mi, MachineBasicBlock::iterator &nmi, MachineFunction::iterator &mbbi, - unsigned regB, unsigned regBIdx, unsigned Dist) { // Check if the instruction has no side effects and if all its defs are dead. SmallVector<unsigned, 4> Kills; - if (!isSafeToDelete(mi, regB, TII, Kills)) + if (!isSafeToDelete(mi, TII, Kills)) return false; // If this instruction kills some virtual registers, we need to @@ -810,10 +807,6 @@ TwoAddressInstructionPass::DeleteUnusedInstr(MachineBasicBlock::iterator &mi, LV->addVirtualRegisterKilled(Kill, NewKill); } } - - // If regB was marked as a kill, update its Kills list. - if (mi->getOperand(regBIdx).isKill()) - LV->removeVirtualRegisterKilled(regB, mi); } mbbi->erase(mi); // Nuke the old inst. @@ -842,7 +835,7 @@ TryInstructionTransform(MachineBasicBlock::iterator &mi, // it so it doesn't clobber regB. bool regBKilled = isKilled(*mi, regB, MRI, TII); if (!regBKilled && mi->getOperand(DstIdx).isDead() && - DeleteUnusedInstr(mi, nmi, mbbi, regB, SrcIdx, Dist)) { + DeleteUnusedInstr(mi, nmi, mbbi, Dist)) { ++NumDeletes; return true; // Done with this instruction. } diff --git a/test/CodeGen/X86/2009-11-18-TwoAddrKill.ll b/test/CodeGen/X86/2009-11-18-TwoAddrKill.ll new file mode 100644 index 0000000..0edaa70 --- /dev/null +++ b/test/CodeGen/X86/2009-11-18-TwoAddrKill.ll @@ -0,0 +1,29 @@ +; RUN: llc < %s +; PR 5300 +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32-n8:16:32" +target triple = "i386-pc-linux-gnu" + +@g_296 = external global i8, align 1 ; <i8*> [#uses=1] + +define noalias i8** @func_31(i32** nocapture %int8p_33, i8** nocapture %p_34, i8* nocapture %p_35) nounwind { +entry: + %cmp.i = icmp sgt i16 undef, 234 ; <i1> [#uses=1] + %tmp17 = select i1 %cmp.i, i16 undef, i16 0 ; <i16> [#uses=2] + %conv8 = trunc i16 %tmp17 to i8 ; <i8> [#uses=3] + br i1 undef, label %cond.false.i29, label %land.lhs.true.i + +land.lhs.true.i: ; preds = %entry + %tobool5.i = icmp eq i32 undef, undef ; <i1> [#uses=1] + br i1 %tobool5.i, label %cond.false.i29, label %bar.exit + +cond.false.i29: ; preds = %land.lhs.true.i, %entry + %tmp = sub i8 0, %conv8 ; <i8> [#uses=1] + %mul.i = and i8 %conv8, %tmp ; <i8> [#uses=1] + br label %bar.exit + +bar.exit: ; preds = %cond.false.i29, %land.lhs.true.i + %call1231 = phi i8 [ %mul.i, %cond.false.i29 ], [ %conv8, %land.lhs.true.i ] ; <i8> [#uses=0] + %conv21 = trunc i16 %tmp17 to i8 ; <i8> [#uses=1] + store i8 %conv21, i8* @g_296 + ret i8** undef +} |