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-rw-r--r--test/MC/Disassembler/ARM/invalid-armv7.txt2
-rw-r--r--test/MC/Disassembler/ARM/invalid-because-armv7.txt2
-rw-r--r--test/MC/Disassembler/ARM/invalid-thumbv7.txt2
3 files changed, 3 insertions, 3 deletions
diff --git a/test/MC/Disassembler/ARM/invalid-armv7.txt b/test/MC/Disassembler/ARM/invalid-armv7.txt
index ee28a27..be79326 100644
--- a/test/MC/Disassembler/ARM/invalid-armv7.txt
+++ b/test/MC/Disassembler/ARM/invalid-armv7.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -disassemble %s -mcpu cortex-a8 -triple armv7 2>&1 | FileCheck %s
+# RUN: not llvm-mc -disassemble %s -mcpu cortex-a8 -triple armv7 2>&1 | FileCheck %s
# This file is checking ARMv7 encodings which are globally invalid, usually due
# to the constraints of the instructions not being met. For example invalid
diff --git a/test/MC/Disassembler/ARM/invalid-because-armv7.txt b/test/MC/Disassembler/ARM/invalid-because-armv7.txt
index 8127d5b..4bf4833 100644
--- a/test/MC/Disassembler/ARM/invalid-because-armv7.txt
+++ b/test/MC/Disassembler/ARM/invalid-because-armv7.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -disassemble -triple armv7 -show-encoding < %s 2>&1 | FileCheck %s
+# RUN: not llvm-mc -disassemble -triple armv7 -show-encoding < %s 2>&1 | FileCheck %s
# This file is checking encodings that are valid on some triples, but not on the
# ARMv7 triple, probably because the relevant instruction is v8, though there
diff --git a/test/MC/Disassembler/ARM/invalid-thumbv7.txt b/test/MC/Disassembler/ARM/invalid-thumbv7.txt
index 5f1d32b..f465b3c 100644
--- a/test/MC/Disassembler/ARM/invalid-thumbv7.txt
+++ b/test/MC/Disassembler/ARM/invalid-thumbv7.txt
@@ -1,4 +1,4 @@
-# RUN: llvm-mc -disassemble %s -mcpu cortex-a8 -triple thumbv7 2>&1 | FileCheck %s
+# RUN: not llvm-mc -disassemble %s -mcpu cortex-a8 -triple thumbv7 2>&1 | FileCheck %s
# This file is checking Thumbv7 encodings which are globally invalid, usually due
# to the constraints of the instructions not being met. For example invalid