diff options
-rw-r--r-- | include/llvm/CodeGen/InstrForest.h | 11 | ||||
-rw-r--r-- | include/llvm/CodeGen/InstrSelection.h | 22 | ||||
-rw-r--r-- | include/llvm/CodeGen/InstrSelectionSupport.h | 16 | ||||
-rw-r--r-- | include/llvm/CodeGen/MachineInstrAnnot.h | 20 | ||||
-rw-r--r-- | lib/CodeGen/InstrSched/InstrScheduling.cpp | 1 | ||||
-rw-r--r-- | lib/CodeGen/InstrSched/SchedGraph.h | 29 | ||||
-rw-r--r-- | lib/CodeGen/InstrSched/SchedPriorities.cpp | 14 | ||||
-rw-r--r-- | lib/CodeGen/InstrSched/SchedPriorities.h | 16 | ||||
-rw-r--r-- | lib/CodeGen/RegAlloc/PhyRegAlloc.cpp | 13 | ||||
-rw-r--r-- | lib/Target/MachineFrameInfo.cpp | 18 | ||||
-rw-r--r-- | lib/Target/SparcV9/InstrSched/InstrScheduling.cpp | 1 | ||||
-rw-r--r-- | lib/Target/SparcV9/InstrSched/SchedGraph.h | 29 | ||||
-rw-r--r-- | lib/Target/SparcV9/InstrSched/SchedPriorities.cpp | 14 | ||||
-rw-r--r-- | lib/Target/SparcV9/InstrSched/SchedPriorities.h | 16 | ||||
-rw-r--r-- | lib/Target/SparcV9/MachineInstrAnnot.h | 20 | ||||
-rw-r--r-- | lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp | 13 |
16 files changed, 77 insertions, 176 deletions
diff --git a/include/llvm/CodeGen/InstrForest.h b/include/llvm/CodeGen/InstrForest.h index 650dbdd..f1871a6 100644 --- a/include/llvm/CodeGen/InstrForest.h +++ b/include/llvm/CodeGen/InstrForest.h @@ -1,8 +1,5 @@ -// $Id$ -*-c++-*- -//*************************************************************************** -// File: -// InstrForest.h -// +//===-- llvm/CodeGen/InstForest.h ------------------------------*- C++ -*--===// +// // Purpose: // Convert SSA graph to instruction trees for instruction selection. // @@ -17,9 +14,7 @@ // (2) O and I are part of the same basic block, and // (3) O has only a single use, viz., I. // -// History: -// 6/28/01 - Vikram Adve - Created -//**************************************************************************/ +//===----------------------------------------------------------------------===// #ifndef LLVM_CODEGEN_INSTRFOREST_H #define LLVM_CODEGEN_INSTRFOREST_H diff --git a/include/llvm/CodeGen/InstrSelection.h b/include/llvm/CodeGen/InstrSelection.h index ed3e128..0e47296 100644 --- a/include/llvm/CodeGen/InstrSelection.h +++ b/include/llvm/CodeGen/InstrSelection.h @@ -1,14 +1,8 @@ -// $Id$ -*-c++-*- -//*************************************************************************** -// File: -// InstrSelection.h -// -// Purpose: -// External interface to instruction selection. -// -// History: -// 7/02/01 - Vikram Adve - Created -//**************************************************************************/ +//===-- llvm/CodeGen/InstrSelection.h --------------------------*- C++ -*--===// +// +// External interface to instruction selection. +// +//===----------------------------------------------------------------------===// #ifndef LLVM_CODEGEN_INSTR_SELECTION_H #define LLVM_CODEGEN_INSTR_SELECTION_H @@ -21,9 +15,9 @@ class InstructionNode; class TargetMachine; class Pass; -/************************* Required Functions ******************************* - * Target-dependent functions that MUST be implemented for each target. - ***************************************************************************/ +//===--------------------- Required Functions --------------------------------- +// Target-dependent functions that MUST be implemented for each target. +// const unsigned MAX_INSTR_PER_VMINSTR = 8; diff --git a/include/llvm/CodeGen/InstrSelectionSupport.h b/include/llvm/CodeGen/InstrSelectionSupport.h index 3f41fb4..a134e35 100644 --- a/include/llvm/CodeGen/InstrSelectionSupport.h +++ b/include/llvm/CodeGen/InstrSelectionSupport.h @@ -1,15 +1,9 @@ -// $Id$ -*-c++-*- -//*************************************************************************** -// File: -// InstrSelectionSupport.h -// -// Purpose: -// Target-independent instruction selection code. -// See SparcInstrSelection.cpp for usage. +//===-- llvm/CodeGen/InstrSelectionSupport.h --------------------*- C++ -*-===// +// +// Target-independent instruction selection code. See SparcInstrSelection.cpp +// for usage. // -// History: -// 10/10/01 - Vikram Adve - Created -//**************************************************************************/ +//===----------------------------------------------------------------------===// #ifndef LLVM_CODEGEN_INSTR_SELECTION_SUPPORT_H #define LLVM_CODEGEN_INSTR_SELECTION_SUPPORT_H diff --git a/include/llvm/CodeGen/MachineInstrAnnot.h b/include/llvm/CodeGen/MachineInstrAnnot.h index d5f1da2..bd3f733 100644 --- a/include/llvm/CodeGen/MachineInstrAnnot.h +++ b/include/llvm/CodeGen/MachineInstrAnnot.h @@ -1,29 +1,20 @@ -// $Id$ -*-c++-*- -//*************************************************************************** -// File: -// MachineInstrAnnot.h +//===-- llvm/CodeGen/MachineInstrAnnot.h ------------------------*- C++ -*-===// +// +// Annotations used to pass information between code generation phases. // -// Purpose: -// Annotations used to pass information between code generation phases. -// -// History: -// 5/10/02 - Vikram Adve - Created -//**************************************************************************/ +//===----------------------------------------------------------------------===// #ifndef MACHINE_INSTR_ANNOT_h #define MACHINE_INSTR_ANNOT_h #include "llvm/Annotation.h" #include "llvm/CodeGen/MachineInstr.h" -#include <vector> class Value; class TmpInstruction; class CallInst; - class CallArgInfo { -private: // Flag values for different argument passing methods static const unsigned char IntArgReg = 0x1; static const unsigned char FPArgReg = 0x2; @@ -60,9 +51,8 @@ public: class CallArgsDescriptor: public Annotation { // Annotation for a MachineInstr -private: static AnnotationID AID; // AnnotationID for this class - std::vector<CallArgInfo> argInfoVec; // Descriptor for each argument + std::vector<CallArgInfo> argInfoVec; // Descriptor for each argument const CallInst* callInstr; // The call instruction == result value const Value* funcPtr; // Pointer for indirect calls TmpInstruction* retAddrReg; // Tmp value for return address reg. diff --git a/lib/CodeGen/InstrSched/InstrScheduling.cpp b/lib/CodeGen/InstrSched/InstrScheduling.cpp index 3eae49c..97360c3 100644 --- a/lib/CodeGen/InstrSched/InstrScheduling.cpp +++ b/lib/CodeGen/InstrSched/InstrScheduling.cpp @@ -13,7 +13,6 @@ #include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h" // FIXME: Remove when modularized better #include "llvm/Target/TargetMachine.h" #include "llvm/BasicBlock.h" -#include "llvm/Instruction.h" #include "Support/CommandLine.h" #include <algorithm> using std::cerr; diff --git a/lib/CodeGen/InstrSched/SchedGraph.h b/lib/CodeGen/InstrSched/SchedGraph.h index 0d59734..eac9c1c 100644 --- a/lib/CodeGen/InstrSched/SchedGraph.h +++ b/lib/CodeGen/InstrSched/SchedGraph.h @@ -1,20 +1,15 @@ -/* -*-C++-*- - **************************************************************************** - * File: - * SchedGraph.h - * - * Purpose: - * Scheduling graph based on SSA graph plus extra dependence edges - * capturing dependences due to machine resources (machine registers, - * CC registers, and any others). - * - * Strategy: - * This graph tries to leverage the SSA graph as much as possible, - * but captures the extra dependences through a common interface. - * - * History: - * 7/20/01 - Vikram Adve - Created - ***************************************************************************/ +//===-- SchedGraph.h - Scheduling Graph --------------------------*- C++ -*--=// +// +// Purpose: +// Scheduling graph based on SSA graph plus extra dependence edges +// capturing dependences due to machine resources (machine registers, +// CC registers, and any others). +// +// Strategy: +// This graph tries to leverage the SSA graph as much as possible, +// but captures the extra dependences through a common interface. +// +//===----------------------------------------------------------------------===// #ifndef LLVM_CODEGEN_SCHEDGRAPH_H #define LLVM_CODEGEN_SCHEDGRAPH_H diff --git a/lib/CodeGen/InstrSched/SchedPriorities.cpp b/lib/CodeGen/InstrSched/SchedPriorities.cpp index 6277576..57126aa 100644 --- a/lib/CodeGen/InstrSched/SchedPriorities.cpp +++ b/lib/CodeGen/InstrSched/SchedPriorities.cpp @@ -1,10 +1,4 @@ -// $Id$ -*-C++-*- -//*************************************************************************** -// File: -// SchedPriorities.h -// -// Purpose: -// Encapsulate heuristics for instruction scheduling. +//===-- SchedPriorities.h - Encapsulate scheduling heuristics -------------===// // // Strategy: // Priority ordering rules: @@ -13,10 +7,8 @@ // (3) Instruction that has the maximum number of dependent instructions. // Note that rules 2 and 3 are only used if issue conflicts prevent // choosing a higher priority instruction by rule 1. -// -// History: -// 7/30/01 - Vikram Adve - Created -//**************************************************************************/ +// +//===----------------------------------------------------------------------===// #include "SchedPriorities.h" #include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h" diff --git a/lib/CodeGen/InstrSched/SchedPriorities.h b/lib/CodeGen/InstrSched/SchedPriorities.h index 4d763d2..31d974d 100644 --- a/lib/CodeGen/InstrSched/SchedPriorities.h +++ b/lib/CodeGen/InstrSched/SchedPriorities.h @@ -1,10 +1,4 @@ -// -*-C++-*- -//*************************************************************************** -// File: -// SchedPriorities.h -// -// Purpose: -// Encapsulate heuristics for instruction scheduling. +//===-- SchedPriorities.h - Encapsulate scheduling heuristics --*- C++ -*--===// // // Strategy: // Priority ordering rules: @@ -13,10 +7,8 @@ // (3) Instruction that has the maximum number of dependent instructions. // Note that rules 2 and 3 are only used if issue conflicts prevent // choosing a higher priority instruction by rule 1. -// -// History: -// 7/30/01 - Vikram Adve - Created -//**************************************************************************/ +// +//===----------------------------------------------------------------------===// #ifndef LLVM_CODEGEN_SCHEDPRIORITIES_H #define LLVM_CODEGEN_SCHEDPRIORITIES_H @@ -26,7 +18,7 @@ #include "llvm/Target/MachineSchedInfo.h" #include <list> #include <Support/hash_set> -#include <iostream> + class Function; class MachineInstr; class SchedulingManager; diff --git a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp index 66f6fed..415c798 100644 --- a/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp +++ b/lib/CodeGen/RegAlloc/PhyRegAlloc.cpp @@ -1,13 +1,8 @@ -//*************************************************************************** -// File: -// PhyRegAlloc.cpp +//===-- PhyRegAlloc.cpp ---------------------------------------------------===// // -// Purpose: -// Register allocation for LLVM. -// -// History: -// 9/10/01 - Ruchira Sasanka - created. -//**************************************************************************/ +// Register allocation for LLVM. +// +//===----------------------------------------------------------------------===// #include "llvm/CodeGen/RegisterAllocation.h" #include "llvm/CodeGen/PhyRegAlloc.h" diff --git a/lib/Target/MachineFrameInfo.cpp b/lib/Target/MachineFrameInfo.cpp index be7feee..0eeacbc 100644 --- a/lib/Target/MachineFrameInfo.cpp +++ b/lib/Target/MachineFrameInfo.cpp @@ -1,22 +1,14 @@ -// $Id$ -*-c++-*- -//*************************************************************************** -// File: -// MachineFrameInfo.cpp +//===-- MachineFrameInfo.cpp-----------------------------------------------===// // -// Purpose: -// Interface to layout of stack frame on target machine. -// Most functions of class MachineFrameInfo have to be machine-specific -// so there is little code here. +// Interface to layout of stack frame on target machine. Most functions of +// class MachineFrameInfo have to be machine-specific so there is little code +// here. // -// History: -// 4/17/02 - Vikram Adve - Created -//**************************************************************************/ - +//===----------------------------------------------------------------------===// #include "llvm/Target/MachineFrameInfo.h" #include "llvm/CodeGen/MachineCodeForMethod.h" - int MachineFrameInfo::getIncomingArgOffset(MachineCodeForMethod& mcInfo, unsigned argNum) const diff --git a/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp b/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp index 3eae49c..97360c3 100644 --- a/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp +++ b/lib/Target/SparcV9/InstrSched/InstrScheduling.cpp @@ -13,7 +13,6 @@ #include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h" // FIXME: Remove when modularized better #include "llvm/Target/TargetMachine.h" #include "llvm/BasicBlock.h" -#include "llvm/Instruction.h" #include "Support/CommandLine.h" #include <algorithm> using std::cerr; diff --git a/lib/Target/SparcV9/InstrSched/SchedGraph.h b/lib/Target/SparcV9/InstrSched/SchedGraph.h index 0d59734..eac9c1c 100644 --- a/lib/Target/SparcV9/InstrSched/SchedGraph.h +++ b/lib/Target/SparcV9/InstrSched/SchedGraph.h @@ -1,20 +1,15 @@ -/* -*-C++-*- - **************************************************************************** - * File: - * SchedGraph.h - * - * Purpose: - * Scheduling graph based on SSA graph plus extra dependence edges - * capturing dependences due to machine resources (machine registers, - * CC registers, and any others). - * - * Strategy: - * This graph tries to leverage the SSA graph as much as possible, - * but captures the extra dependences through a common interface. - * - * History: - * 7/20/01 - Vikram Adve - Created - ***************************************************************************/ +//===-- SchedGraph.h - Scheduling Graph --------------------------*- C++ -*--=// +// +// Purpose: +// Scheduling graph based on SSA graph plus extra dependence edges +// capturing dependences due to machine resources (machine registers, +// CC registers, and any others). +// +// Strategy: +// This graph tries to leverage the SSA graph as much as possible, +// but captures the extra dependences through a common interface. +// +//===----------------------------------------------------------------------===// #ifndef LLVM_CODEGEN_SCHEDGRAPH_H #define LLVM_CODEGEN_SCHEDGRAPH_H diff --git a/lib/Target/SparcV9/InstrSched/SchedPriorities.cpp b/lib/Target/SparcV9/InstrSched/SchedPriorities.cpp index 6277576..57126aa 100644 --- a/lib/Target/SparcV9/InstrSched/SchedPriorities.cpp +++ b/lib/Target/SparcV9/InstrSched/SchedPriorities.cpp @@ -1,10 +1,4 @@ -// $Id$ -*-C++-*- -//*************************************************************************** -// File: -// SchedPriorities.h -// -// Purpose: -// Encapsulate heuristics for instruction scheduling. +//===-- SchedPriorities.h - Encapsulate scheduling heuristics -------------===// // // Strategy: // Priority ordering rules: @@ -13,10 +7,8 @@ // (3) Instruction that has the maximum number of dependent instructions. // Note that rules 2 and 3 are only used if issue conflicts prevent // choosing a higher priority instruction by rule 1. -// -// History: -// 7/30/01 - Vikram Adve - Created -//**************************************************************************/ +// +//===----------------------------------------------------------------------===// #include "SchedPriorities.h" #include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h" diff --git a/lib/Target/SparcV9/InstrSched/SchedPriorities.h b/lib/Target/SparcV9/InstrSched/SchedPriorities.h index 4d763d2..31d974d 100644 --- a/lib/Target/SparcV9/InstrSched/SchedPriorities.h +++ b/lib/Target/SparcV9/InstrSched/SchedPriorities.h @@ -1,10 +1,4 @@ -// -*-C++-*- -//*************************************************************************** -// File: -// SchedPriorities.h -// -// Purpose: -// Encapsulate heuristics for instruction scheduling. +//===-- SchedPriorities.h - Encapsulate scheduling heuristics --*- C++ -*--===// // // Strategy: // Priority ordering rules: @@ -13,10 +7,8 @@ // (3) Instruction that has the maximum number of dependent instructions. // Note that rules 2 and 3 are only used if issue conflicts prevent // choosing a higher priority instruction by rule 1. -// -// History: -// 7/30/01 - Vikram Adve - Created -//**************************************************************************/ +// +//===----------------------------------------------------------------------===// #ifndef LLVM_CODEGEN_SCHEDPRIORITIES_H #define LLVM_CODEGEN_SCHEDPRIORITIES_H @@ -26,7 +18,7 @@ #include "llvm/Target/MachineSchedInfo.h" #include <list> #include <Support/hash_set> -#include <iostream> + class Function; class MachineInstr; class SchedulingManager; diff --git a/lib/Target/SparcV9/MachineInstrAnnot.h b/lib/Target/SparcV9/MachineInstrAnnot.h index d5f1da2..bd3f733 100644 --- a/lib/Target/SparcV9/MachineInstrAnnot.h +++ b/lib/Target/SparcV9/MachineInstrAnnot.h @@ -1,29 +1,20 @@ -// $Id$ -*-c++-*- -//*************************************************************************** -// File: -// MachineInstrAnnot.h +//===-- llvm/CodeGen/MachineInstrAnnot.h ------------------------*- C++ -*-===// +// +// Annotations used to pass information between code generation phases. // -// Purpose: -// Annotations used to pass information between code generation phases. -// -// History: -// 5/10/02 - Vikram Adve - Created -//**************************************************************************/ +//===----------------------------------------------------------------------===// #ifndef MACHINE_INSTR_ANNOT_h #define MACHINE_INSTR_ANNOT_h #include "llvm/Annotation.h" #include "llvm/CodeGen/MachineInstr.h" -#include <vector> class Value; class TmpInstruction; class CallInst; - class CallArgInfo { -private: // Flag values for different argument passing methods static const unsigned char IntArgReg = 0x1; static const unsigned char FPArgReg = 0x2; @@ -60,9 +51,8 @@ public: class CallArgsDescriptor: public Annotation { // Annotation for a MachineInstr -private: static AnnotationID AID; // AnnotationID for this class - std::vector<CallArgInfo> argInfoVec; // Descriptor for each argument + std::vector<CallArgInfo> argInfoVec; // Descriptor for each argument const CallInst* callInstr; // The call instruction == result value const Value* funcPtr; // Pointer for indirect calls TmpInstruction* retAddrReg; // Tmp value for return address reg. diff --git a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp index 66f6fed..415c798 100644 --- a/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp +++ b/lib/Target/SparcV9/RegAlloc/PhyRegAlloc.cpp @@ -1,13 +1,8 @@ -//*************************************************************************** -// File: -// PhyRegAlloc.cpp +//===-- PhyRegAlloc.cpp ---------------------------------------------------===// // -// Purpose: -// Register allocation for LLVM. -// -// History: -// 9/10/01 - Ruchira Sasanka - created. -//**************************************************************************/ +// Register allocation for LLVM. +// +//===----------------------------------------------------------------------===// #include "llvm/CodeGen/RegisterAllocation.h" #include "llvm/CodeGen/PhyRegAlloc.h" |