diff options
-rw-r--r-- | lib/CodeGen/LiveIntervalAnalysis.cpp | 6 | ||||
-rw-r--r-- | lib/CodeGen/MachineRegisterInfo.cpp | 8 | ||||
-rw-r--r-- | lib/CodeGen/RegAllocLinearScan.cpp | 6 |
3 files changed, 8 insertions, 12 deletions
diff --git a/lib/CodeGen/LiveIntervalAnalysis.cpp b/lib/CodeGen/LiveIntervalAnalysis.cpp index e1b23fd..be78200 100644 --- a/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -1087,11 +1087,9 @@ LiveIntervals::isProfitableToCoalesce(LiveInterval &DstInt, LiveInterval &SrcInt SmallVector<MachineInstr*,16> &OtherCopies) { bool HaveConflict = false; unsigned NumIdent = 0; - for (MachineRegisterInfo::reg_iterator ri = mri_->reg_begin(SrcInt.reg), - re = mri_->reg_end(); ri != re; ++ri) { + for (MachineRegisterInfo::def_iterator ri = mri_->def_begin(SrcInt.reg), + re = mri_->def_end(); ri != re; ++ri) { MachineOperand &O = ri.getOperand(); - if (!O.isDef()) - continue; MachineInstr *MI = &*ri; unsigned SrcReg, DstReg, SrcSubReg, DstSubReg; diff --git a/lib/CodeGen/MachineRegisterInfo.cpp b/lib/CodeGen/MachineRegisterInfo.cpp index 544d83a..b31973e 100644 --- a/lib/CodeGen/MachineRegisterInfo.cpp +++ b/lib/CodeGen/MachineRegisterInfo.cpp @@ -110,11 +110,9 @@ void MachineRegisterInfo::replaceRegWith(unsigned FromReg, unsigned ToReg) { MachineInstr *MachineRegisterInfo::getVRegDef(unsigned Reg) const { assert(Reg-TargetRegisterInfo::FirstVirtualRegister < VRegInfo.size() && "Invalid vreg!"); - for (reg_iterator I = reg_begin(Reg), E = reg_end(); I != E; ++I) { - // Since we are in SSA form, we can stop at the first definition. - if (I.getOperand().isDef()) - return &*I; - } + // Since we are in SSA form, we can use the first definition. + if (!def_empty(Reg)) + return &*def_begin(Reg); return 0; } diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp index 64490d2..9d22e13 100644 --- a/lib/CodeGen/RegAllocLinearScan.cpp +++ b/lib/CodeGen/RegAllocLinearScan.cpp @@ -397,10 +397,10 @@ unsigned RALinScan::attemptTrivialCoalescing(LiveInterval &cur, unsigned Reg) { // Remove unnecessary kills since a copy does not clobber the register. if (li_->hasInterval(SrcReg)) { LiveInterval &SrcLI = li_->getInterval(SrcReg); - for (MachineRegisterInfo::reg_iterator I = mri_->reg_begin(cur.reg), - E = mri_->reg_end(); I != E; ++I) { + for (MachineRegisterInfo::use_iterator I = mri_->use_begin(cur.reg), + E = mri_->use_end(); I != E; ++I) { MachineOperand &O = I.getOperand(); - if (!O.isUse() || !O.isKill()) + if (!O.isKill()) continue; MachineInstr *MI = &*I; if (SrcLI.liveAt(li_->getDefIndex(li_->getInstructionIndex(MI)))) |