diff options
| -rw-r--r-- | lib/Target/X86/README.txt | 8 | ||||
| -rw-r--r-- | test/CodeGen/X86/lea-3.ll | 2 |
2 files changed, 1 insertions, 9 deletions
diff --git a/lib/Target/X86/README.txt b/lib/Target/X86/README.txt index 94cf25b..1902485 100644 --- a/lib/Target/X86/README.txt +++ b/lib/Target/X86/README.txt @@ -7,14 +7,6 @@ copy (3-addr bswap + memory support?) This is available on Atom processors. //===---------------------------------------------------------------------===// -CodeGen/X86/lea-3.ll:test3 should be a single LEA, not a shift/move. The X86 -backend knows how to three-addressify this shift, but it appears the register -allocator isn't even asking it to do so in this case. We should investigate -why this isn't happening, it could have significant impact on other important -cases for X86 as well. - -//===---------------------------------------------------------------------===// - This should be one DIV/IDIV instruction, not a libcall: unsigned test(unsigned long long X, unsigned Y) { diff --git a/test/CodeGen/X86/lea-3.ll b/test/CodeGen/X86/lea-3.ll index 040c5c2..c439ee1 100644 --- a/test/CodeGen/X86/lea-3.ll +++ b/test/CodeGen/X86/lea-3.ll @@ -14,7 +14,7 @@ define i32 @test(i32 %a) { ret i32 %tmp2 } -;; TODO! LEA instead of shift + copy. +; CHECK: leaq (,[[A0]],8), %rax define i64 @test3(i64 %a) { %tmp2 = shl i64 %a, 3 ret i64 %tmp2 |