aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp4
-rw-r--r--lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h5
2 files changed, 6 insertions, 3 deletions
diff --git a/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp b/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
index a8dbd9c..eb9c2cd 100644
--- a/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
+++ b/lib/Target/ARM/Disassembler/ARMDisassemblerCore.cpp
@@ -892,8 +892,8 @@ static inline bool getBFCInvMask(uint32_t insn, uint32_t &mask) {
uint32_t lsb = slice(insn, 11, 7);
uint32_t msb = slice(insn, 20, 16);
uint32_t Val = 0;
- if (lsb > msb) {
- errs() << "Encoding error: lsb > msb\n";
+ if (msb < lsb) {
+ errs() << "Encoding error: msb < lsb\n";
return false;
}
diff --git a/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h b/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
index aac2d2b..4bc4070 100644
--- a/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
+++ b/lib/Target/ARM/Disassembler/ThumbDisassemblerCore.h
@@ -1552,7 +1552,10 @@ static bool DisassembleThumb2DPBinImm(MCInst &MI, unsigned Opcode,
Opcode == ARM::t2BFI) && "Invalid opcode");
MI.addOperand(MCOperand::CreateImm(getLsb(insn)));
if (Opcode == ARM::t2BFI) {
- assert(getMsb(insn) >= getLsb(insn) && "Encoding error");
+ if (getMsb(insn) < getLsb(insn)) {
+ errs() << "Encoding error: msb < lsb\n";
+ return false;
+ }
MI.addOperand(MCOperand::CreateImm(getMsb(insn) - getLsb(insn) + 1));
} else
MI.addOperand(MCOperand::CreateImm(getWidthMinus1(insn) + 1));