diff options
| -rw-r--r-- | lib/Target/X86/X86InstrCompiler.td | 14 | ||||
| -rw-r--r-- | test/CodeGen/X86/no-cmov.ll | 11 |
2 files changed, 19 insertions, 6 deletions
diff --git a/lib/Target/X86/X86InstrCompiler.td b/lib/Target/X86/X86InstrCompiler.td index f387962..734e598 100644 --- a/lib/Target/X86/X86InstrCompiler.td +++ b/lib/Target/X86/X86InstrCompiler.td @@ -1081,12 +1081,14 @@ def : Pat<(X86cmp GR64:$src1, 0), // inverted. multiclass CMOVmr<PatLeaf InvertedCond, Instruction Inst16, Instruction Inst32, Instruction Inst64> { - def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, InvertedCond, EFLAGS), - (Inst16 GR16:$src2, addr:$src1)>; - def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, InvertedCond, EFLAGS), - (Inst32 GR32:$src2, addr:$src1)>; - def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, InvertedCond, EFLAGS), - (Inst64 GR64:$src2, addr:$src1)>; + let Predicates = [HasCMov] in { + def : Pat<(X86cmov (loadi16 addr:$src1), GR16:$src2, InvertedCond, EFLAGS), + (Inst16 GR16:$src2, addr:$src1)>; + def : Pat<(X86cmov (loadi32 addr:$src1), GR32:$src2, InvertedCond, EFLAGS), + (Inst32 GR32:$src2, addr:$src1)>; + def : Pat<(X86cmov (loadi64 addr:$src1), GR64:$src2, InvertedCond, EFLAGS), + (Inst64 GR64:$src2, addr:$src1)>; + } } defm : CMOVmr<X86_COND_B , CMOVAE16rm, CMOVAE32rm, CMOVAE64rm>; diff --git a/test/CodeGen/X86/no-cmov.ll b/test/CodeGen/X86/no-cmov.ll new file mode 100644 index 0000000..62d73b0 --- /dev/null +++ b/test/CodeGen/X86/no-cmov.ll @@ -0,0 +1,11 @@ +; RUN: llc -march=x86 -mcpu=i486 < %s | FileCheck %s + +define i32 @test1(i32 %g, i32* %j) { + %tobool = icmp eq i32 %g, 0 + %cmp = load i32* %j, align 4 + %retval.0 = select i1 %tobool, i32 1, i32 %cmp + ret i32 %retval.0 + +; CHECK: test1: +; CHECK-NOT: cmov +} |