diff options
54 files changed, 57 insertions, 60 deletions
diff --git a/Makefile.rules b/Makefile.rules index 19520dd..9dcb5dd 100644 --- a/Makefile.rules +++ b/Makefile.rules @@ -1775,8 +1775,8 @@ $(ObjDir)/%GenFastISel.inc.tmp : %.td $(ObjDir)/.dir $(Echo) "Building $(<F) \"fast\" instruction selector implementation with tblgen" $(Verb) $(TableGen) -gen-fast-isel -o $(call SYSPATH, $@) $< -$(TARGET:%=$(ObjDir)/%GenSubtarget.inc.tmp): \ -$(ObjDir)/%GenSubtarget.inc.tmp : %.td $(ObjDir)/.dir +$(TARGET:%=$(ObjDir)/%GenSubtargetInfo.inc.tmp): \ +$(ObjDir)/%GenSubtargetInfo.inc.tmp : %.td $(ObjDir)/.dir $(Echo) "Building $(<F) subtarget information with tblgen" $(Verb) $(TableGen) -gen-subtarget -o $(call SYSPATH, $@) $< diff --git a/lib/Target/ARM/ARMSubtarget.cpp b/lib/Target/ARM/ARMSubtarget.cpp index 5f94a1f..a7010c5 100644 --- a/lib/Target/ARM/ARMSubtarget.cpp +++ b/lib/Target/ARM/ARMSubtarget.cpp @@ -21,7 +21,7 @@ #define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_TARGET_DESC -#include "ARMGenSubtarget.inc" +#include "ARMGenSubtargetInfo.inc" using namespace llvm; diff --git a/lib/Target/ARM/ARMSubtarget.h b/lib/Target/ARM/ARMSubtarget.h index 3a9431f..66e4426 100644 --- a/lib/Target/ARM/ARMSubtarget.h +++ b/lib/Target/ARM/ARMSubtarget.h @@ -20,7 +20,7 @@ #include <string> #define GET_SUBTARGETINFO_HEADER -#include "ARMGenSubtarget.inc" +#include "ARMGenSubtargetInfo.inc" namespace llvm { class GlobalValue; diff --git a/lib/Target/ARM/CMakeLists.txt b/lib/Target/ARM/CMakeLists.txt index b1d4f54..a261ca0 100644 --- a/lib/Target/ARM/CMakeLists.txt +++ b/lib/Target/ARM/CMakeLists.txt @@ -9,7 +9,7 @@ tablegen(ARMGenAsmMatcher.inc -gen-asm-matcher) tablegen(ARMGenDAGISel.inc -gen-dag-isel) tablegen(ARMGenFastISel.inc -gen-fast-isel) tablegen(ARMGenCallingConv.inc -gen-callingconv) -tablegen(ARMGenSubtarget.inc -gen-subtarget) +tablegen(ARMGenSubtargetInfo.inc -gen-subtarget) tablegen(ARMGenEDInfo.inc -gen-enhanced-disassembly-info) tablegen(ARMGenDecoderTables.inc -gen-arm-decoder) diff --git a/lib/Target/ARM/Makefile b/lib/Target/ARM/Makefile index 6472c53..51a8ac4 100644 --- a/lib/Target/ARM/Makefile +++ b/lib/Target/ARM/Makefile @@ -14,7 +14,7 @@ TARGET = ARM # Make sure that tblgen is run, first thing. BUILT_SOURCES = ARMGenRegisterInfo.inc ARMGenInstrInfo.inc \ ARMGenAsmWriter.inc ARMGenAsmMatcher.inc \ - ARMGenDAGISel.inc ARMGenSubtarget.inc \ + ARMGenDAGISel.inc ARMGenSubtargetInfo.inc \ ARMGenCodeEmitter.inc ARMGenCallingConv.inc \ ARMGenDecoderTables.inc ARMGenEDInfo.inc \ ARMGenFastISel.inc ARMGenMCCodeEmitter.inc diff --git a/lib/Target/Alpha/AlphaSubtarget.cpp b/lib/Target/Alpha/AlphaSubtarget.cpp index c1effe6..fce65fc 100644 --- a/lib/Target/Alpha/AlphaSubtarget.cpp +++ b/lib/Target/Alpha/AlphaSubtarget.cpp @@ -13,12 +13,11 @@ #include "AlphaSubtarget.h" #include "Alpha.h" -#include "AlphaGenSubtarget.inc" #define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_TARGET_DESC -#include "AlphaGenSubtarget.inc" +#include "AlphaGenSubtargetInfo.inc" using namespace llvm; diff --git a/lib/Target/Alpha/AlphaSubtarget.h b/lib/Target/Alpha/AlphaSubtarget.h index 2924921..847d495 100644 --- a/lib/Target/Alpha/AlphaSubtarget.h +++ b/lib/Target/Alpha/AlphaSubtarget.h @@ -19,7 +19,7 @@ #include <string> #define GET_SUBTARGETINFO_HEADER -#include "AlphaGenSubtarget.inc" +#include "AlphaGenSubtargetInfo.inc" namespace llvm { diff --git a/lib/Target/Alpha/CMakeLists.txt b/lib/Target/Alpha/CMakeLists.txt index 1f9edcf..3121889 100644 --- a/lib/Target/Alpha/CMakeLists.txt +++ b/lib/Target/Alpha/CMakeLists.txt @@ -5,7 +5,7 @@ tablegen(AlphaGenInstrInfo.inc -gen-instr-info) tablegen(AlphaGenAsmWriter.inc -gen-asm-writer) tablegen(AlphaGenDAGISel.inc -gen-dag-isel) tablegen(AlphaGenCallingConv.inc -gen-callingconv) -tablegen(AlphaGenSubtarget.inc -gen-subtarget) +tablegen(AlphaGenSubtargetInfo.inc -gen-subtarget) add_llvm_target(AlphaCodeGen AlphaAsmPrinter.cpp diff --git a/lib/Target/Alpha/Makefile b/lib/Target/Alpha/Makefile index 40c4f90..9409ae5 100644 --- a/lib/Target/Alpha/Makefile +++ b/lib/Target/Alpha/Makefile @@ -14,7 +14,7 @@ TARGET = Alpha # Make sure that tblgen is run, first thing. BUILT_SOURCES = AlphaGenRegisterInfo.inc AlphaGenInstrInfo.inc \ AlphaGenAsmWriter.inc AlphaGenDAGISel.inc \ - AlphaGenCallingConv.inc AlphaGenSubtarget.inc + AlphaGenCallingConv.inc AlphaGenSubtargetInfo.inc DIRS = TargetInfo diff --git a/lib/Target/Blackfin/BlackfinSubtarget.cpp b/lib/Target/Blackfin/BlackfinSubtarget.cpp index 6946580..9d1d481 100644 --- a/lib/Target/Blackfin/BlackfinSubtarget.cpp +++ b/lib/Target/Blackfin/BlackfinSubtarget.cpp @@ -16,7 +16,7 @@ #define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_TARGET_DESC -#include "BlackfinGenSubtarget.inc" +#include "BlackfinGenSubtargetInfo.inc" using namespace llvm; diff --git a/lib/Target/Blackfin/BlackfinSubtarget.h b/lib/Target/Blackfin/BlackfinSubtarget.h index 9786fec..a7d6c16 100644 --- a/lib/Target/Blackfin/BlackfinSubtarget.h +++ b/lib/Target/Blackfin/BlackfinSubtarget.h @@ -18,7 +18,7 @@ #include <string> #define GET_SUBTARGETINFO_HEADER -#include "BlackfinGenSubtarget.inc" +#include "BlackfinGenSubtargetInfo.inc" namespace llvm { diff --git a/lib/Target/Blackfin/CMakeLists.txt b/lib/Target/Blackfin/CMakeLists.txt index 8fc63aa..9df4ab0 100644 --- a/lib/Target/Blackfin/CMakeLists.txt +++ b/lib/Target/Blackfin/CMakeLists.txt @@ -4,7 +4,7 @@ tablegen(BlackfinGenRegisterInfo.inc -gen-register-info) tablegen(BlackfinGenInstrInfo.inc -gen-instr-info) tablegen(BlackfinGenAsmWriter.inc -gen-asm-writer) tablegen(BlackfinGenDAGISel.inc -gen-dag-isel) -tablegen(BlackfinGenSubtarget.inc -gen-subtarget) +tablegen(BlackfinGenSubtargetInfo.inc -gen-subtarget) tablegen(BlackfinGenCallingConv.inc -gen-callingconv) tablegen(BlackfinGenIntrinsics.inc -gen-tgt-intrinsic) diff --git a/lib/Target/Blackfin/Makefile b/lib/Target/Blackfin/Makefile index a9edec7..63f1543 100644 --- a/lib/Target/Blackfin/Makefile +++ b/lib/Target/Blackfin/Makefile @@ -14,7 +14,7 @@ TARGET = Blackfin # Make sure that tblgen is run, first thing. BUILT_SOURCES = BlackfinGenRegisterInfo.inc BlackfinGenInstrInfo.inc \ BlackfinGenAsmWriter.inc \ - BlackfinGenDAGISel.inc BlackfinGenSubtarget.inc \ + BlackfinGenDAGISel.inc BlackfinGenSubtargetInfo.inc \ BlackfinGenCallingConv.inc BlackfinGenIntrinsics.inc DIRS = TargetInfo diff --git a/lib/Target/CellSPU/CMakeLists.txt b/lib/Target/CellSPU/CMakeLists.txt index d769cb9..14e8208 100644 --- a/lib/Target/CellSPU/CMakeLists.txt +++ b/lib/Target/CellSPU/CMakeLists.txt @@ -5,7 +5,7 @@ tablegen(SPUGenCodeEmitter.inc -gen-emitter) tablegen(SPUGenRegisterInfo.inc -gen-register-info) tablegen(SPUGenInstrInfo.inc -gen-instr-info) tablegen(SPUGenDAGISel.inc -gen-dag-isel) -tablegen(SPUGenSubtarget.inc -gen-subtarget) +tablegen(SPUGenSubtargetInfo.inc -gen-subtarget) tablegen(SPUGenCallingConv.inc -gen-callingconv) add_llvm_target(CellSPUCodeGen diff --git a/lib/Target/CellSPU/Makefile b/lib/Target/CellSPU/Makefile index 5bb6f9c..c804b16 100644 --- a/lib/Target/CellSPU/Makefile +++ b/lib/Target/CellSPU/Makefile @@ -13,7 +13,7 @@ TARGET = SPU BUILT_SOURCES = SPUGenInstrInfo.inc SPUGenRegisterInfo.inc \ SPUGenAsmWriter.inc SPUGenCodeEmitter.inc \ SPUGenDAGISel.inc \ - SPUGenSubtarget.inc SPUGenCallingConv.inc + SPUGenSubtargetInfo.inc SPUGenCallingConv.inc DIRS = TargetInfo diff --git a/lib/Target/CellSPU/SPUSubtarget.cpp b/lib/Target/CellSPU/SPUSubtarget.cpp index 4e136a4..2481e3b 100644 --- a/lib/Target/CellSPU/SPUSubtarget.cpp +++ b/lib/Target/CellSPU/SPUSubtarget.cpp @@ -19,7 +19,7 @@ #define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_TARGET_DESC -#include "SPUGenSubtarget.inc" +#include "SPUGenSubtargetInfo.inc" using namespace llvm; diff --git a/lib/Target/CellSPU/SPUSubtarget.h b/lib/Target/CellSPU/SPUSubtarget.h index 72f36ec..19b97d3 100644 --- a/lib/Target/CellSPU/SPUSubtarget.h +++ b/lib/Target/CellSPU/SPUSubtarget.h @@ -19,7 +19,7 @@ #include <string> #define GET_SUBTARGETINFO_HEADER -#include "SPUGenSubtarget.inc" +#include "SPUGenSubtargetInfo.inc" namespace llvm { class GlobalValue; diff --git a/lib/Target/MBlaze/CMakeLists.txt b/lib/Target/MBlaze/CMakeLists.txt index 2aa9847..536726d 100644 --- a/lib/Target/MBlaze/CMakeLists.txt +++ b/lib/Target/MBlaze/CMakeLists.txt @@ -7,7 +7,7 @@ tablegen(MBlazeGenAsmWriter.inc -gen-asm-writer) tablegen(MBlazeGenAsmMatcher.inc -gen-asm-matcher) tablegen(MBlazeGenDAGISel.inc -gen-dag-isel) tablegen(MBlazeGenCallingConv.inc -gen-callingconv) -tablegen(MBlazeGenSubtarget.inc -gen-subtarget) +tablegen(MBlazeGenSubtargetInfo.inc -gen-subtarget) tablegen(MBlazeGenIntrinsics.inc -gen-tgt-intrinsic) tablegen(MBlazeGenEDInfo.inc -gen-enhanced-disassembly-info) diff --git a/lib/Target/MBlaze/MBlazeSubtarget.cpp b/lib/Target/MBlaze/MBlazeSubtarget.cpp index df1eec6..81578ce 100644 --- a/lib/Target/MBlaze/MBlazeSubtarget.cpp +++ b/lib/Target/MBlaze/MBlazeSubtarget.cpp @@ -19,7 +19,7 @@ #define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_TARGET_DESC -#include "MBlazeGenSubtarget.inc" +#include "MBlazeGenSubtargetInfo.inc" using namespace llvm; diff --git a/lib/Target/MBlaze/MBlazeSubtarget.h b/lib/Target/MBlaze/MBlazeSubtarget.h index d337f23..7d70040 100644 --- a/lib/Target/MBlaze/MBlazeSubtarget.h +++ b/lib/Target/MBlaze/MBlazeSubtarget.h @@ -19,7 +19,7 @@ #include <string> #define GET_SUBTARGETINFO_HEADER -#include "MBlazeGenSubtarget.inc" +#include "MBlazeGenSubtargetInfo.inc" namespace llvm { diff --git a/lib/Target/MBlaze/Makefile b/lib/Target/MBlaze/Makefile index 171548f..829122f 100644 --- a/lib/Target/MBlaze/Makefile +++ b/lib/Target/MBlaze/Makefile @@ -15,7 +15,7 @@ BUILT_SOURCES = MBlazeGenRegisterInfo.inc MBlazeGenInstrInfo.inc \ MBlazeGenAsmWriter.inc \ MBlazeGenDAGISel.inc MBlazeGenAsmMatcher.inc \ MBlazeGenCodeEmitter.inc MBlazeGenCallingConv.inc \ - MBlazeGenSubtarget.inc MBlazeGenIntrinsics.inc \ + MBlazeGenSubtargetInfo.inc MBlazeGenIntrinsics.inc \ MBlazeGenEDInfo.inc DIRS = InstPrinter AsmParser Disassembler TargetInfo diff --git a/lib/Target/MSP430/CMakeLists.txt b/lib/Target/MSP430/CMakeLists.txt index 613b259..9d156e7 100644 --- a/lib/Target/MSP430/CMakeLists.txt +++ b/lib/Target/MSP430/CMakeLists.txt @@ -5,7 +5,7 @@ tablegen(MSP430GenInstrInfo.inc -gen-instr-info) tablegen(MSP430GenAsmWriter.inc -gen-asm-writer) tablegen(MSP430GenDAGISel.inc -gen-dag-isel) tablegen(MSP430GenCallingConv.inc -gen-callingconv) -tablegen(MSP430GenSubtarget.inc -gen-subtarget) +tablegen(MSP430GenSubtargetInfo.inc -gen-subtarget) add_llvm_target(MSP430CodeGen MSP430BranchSelector.cpp diff --git a/lib/Target/MSP430/MSP430Subtarget.cpp b/lib/Target/MSP430/MSP430Subtarget.cpp index 81c6b85..bd8d7cd 100644 --- a/lib/Target/MSP430/MSP430Subtarget.cpp +++ b/lib/Target/MSP430/MSP430Subtarget.cpp @@ -17,7 +17,7 @@ #define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_TARGET_DESC -#include "MSP430GenSubtarget.inc" +#include "MSP430GenSubtargetInfo.inc" using namespace llvm; diff --git a/lib/Target/MSP430/MSP430Subtarget.h b/lib/Target/MSP430/MSP430Subtarget.h index 034f88d..ead213b 100644 --- a/lib/Target/MSP430/MSP430Subtarget.h +++ b/lib/Target/MSP430/MSP430Subtarget.h @@ -17,7 +17,7 @@ #include "llvm/Target/TargetSubtargetInfo.h" #define GET_SUBTARGETINFO_HEADER -#include "MSP430GenSubtarget.inc" +#include "MSP430GenSubtargetInfo.inc" #include <string> diff --git a/lib/Target/MSP430/Makefile b/lib/Target/MSP430/Makefile index 266330a..30a4e49 100644 --- a/lib/Target/MSP430/Makefile +++ b/lib/Target/MSP430/Makefile @@ -15,7 +15,7 @@ TARGET = MSP430 BUILT_SOURCES = MSP430GenRegisterInfo.inc MSP430GenInstrInfo.inc \ MSP430GenAsmWriter.inc \ MSP430GenDAGISel.inc MSP430GenCallingConv.inc \ - MSP430GenSubtarget.inc + MSP430GenSubtargetInfo.inc DIRS = InstPrinter TargetInfo diff --git a/lib/Target/Mips/CMakeLists.txt b/lib/Target/Mips/CMakeLists.txt index 71b13c8..2c35c36 100644 --- a/lib/Target/Mips/CMakeLists.txt +++ b/lib/Target/Mips/CMakeLists.txt @@ -5,7 +5,7 @@ tablegen(MipsGenInstrInfo.inc -gen-instr-info) tablegen(MipsGenAsmWriter.inc -gen-asm-writer) tablegen(MipsGenDAGISel.inc -gen-dag-isel) tablegen(MipsGenCallingConv.inc -gen-callingconv) -tablegen(MipsGenSubtarget.inc -gen-subtarget) +tablegen(MipsGenSubtargetInfo.inc -gen-subtarget) add_llvm_target(MipsCodeGen MipsAsmPrinter.cpp diff --git a/lib/Target/Mips/Makefile b/lib/Target/Mips/Makefile index 0b6dd56..eafcc4a 100644 --- a/lib/Target/Mips/Makefile +++ b/lib/Target/Mips/Makefile @@ -15,7 +15,7 @@ TARGET = Mips BUILT_SOURCES = MipsGenRegisterInfo.inc MipsGenInstrInfo.inc \ MipsGenAsmWriter.inc \ MipsGenDAGISel.inc MipsGenCallingConv.inc \ - MipsGenSubtarget.inc + MipsGenSubtargetInfo.inc DIRS = TargetInfo diff --git a/lib/Target/Mips/MipsSubtarget.cpp b/lib/Target/Mips/MipsSubtarget.cpp index 437e718..a96f872 100644 --- a/lib/Target/Mips/MipsSubtarget.cpp +++ b/lib/Target/Mips/MipsSubtarget.cpp @@ -17,7 +17,7 @@ #define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_TARGET_DESC -#include "MipsGenSubtarget.inc" +#include "MipsGenSubtargetInfo.inc" using namespace llvm; diff --git a/lib/Target/Mips/MipsSubtarget.h b/lib/Target/Mips/MipsSubtarget.h index c090252..ae76470 100644 --- a/lib/Target/Mips/MipsSubtarget.h +++ b/lib/Target/Mips/MipsSubtarget.h @@ -19,7 +19,7 @@ #include <string> #define GET_SUBTARGETINFO_HEADER -#include "MipsGenSubtarget.inc" +#include "MipsGenSubtargetInfo.inc" namespace llvm { diff --git a/lib/Target/PTX/CMakeLists.txt b/lib/Target/PTX/CMakeLists.txt index 33bae7c..0e138c0 100644 --- a/lib/Target/PTX/CMakeLists.txt +++ b/lib/Target/PTX/CMakeLists.txt @@ -5,7 +5,7 @@ tablegen(PTXGenCallingConv.inc -gen-callingconv) tablegen(PTXGenDAGISel.inc -gen-dag-isel) tablegen(PTXGenInstrInfo.inc -gen-instr-info) tablegen(PTXGenRegisterInfo.inc -gen-register-info) -tablegen(PTXGenSubtarget.inc -gen-subtarget) +tablegen(PTXGenSubtargetInfo.inc -gen-subtarget) add_llvm_target(PTXCodeGen PTXAsmPrinter.cpp diff --git a/lib/Target/PTX/Makefile b/lib/Target/PTX/Makefile index 9dccb4a..da3f915 100644 --- a/lib/Target/PTX/Makefile +++ b/lib/Target/PTX/Makefile @@ -17,7 +17,7 @@ BUILT_SOURCES = PTXGenAsmWriter.inc \ PTXGenDAGISel.inc \ PTXGenInstrInfo.inc \ PTXGenRegisterInfo.inc \ - PTXGenSubtarget.inc + PTXGenSubtargetInfo.inc DIRS = TargetInfo diff --git a/lib/Target/PTX/PTXSubtarget.cpp b/lib/Target/PTX/PTXSubtarget.cpp index a13ddbd..5eff24a 100644 --- a/lib/Target/PTX/PTXSubtarget.cpp +++ b/lib/Target/PTX/PTXSubtarget.cpp @@ -17,7 +17,7 @@ #define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_TARGET_DESC -#include "PTXGenSubtarget.inc" +#include "PTXGenSubtargetInfo.inc" using namespace llvm; @@ -63,5 +63,3 @@ std::string PTXSubtarget::getPTXVersionString() const { case PTX_VERSION_2_3: return "2.3"; } } - -#include "PTXGenSubtarget.inc" diff --git a/lib/Target/PTX/PTXSubtarget.h b/lib/Target/PTX/PTXSubtarget.h index 0736573..913f0a2 100644 --- a/lib/Target/PTX/PTXSubtarget.h +++ b/lib/Target/PTX/PTXSubtarget.h @@ -17,7 +17,7 @@ #include "llvm/Target/TargetSubtargetInfo.h" #define GET_SUBTARGETINFO_HEADER -#include "PTXGenSubtarget.inc" +#include "PTXGenSubtargetInfo.inc" namespace llvm { class PTXSubtarget : public PTXGenSubtargetInfo { diff --git a/lib/Target/PowerPC/CMakeLists.txt b/lib/Target/PowerPC/CMakeLists.txt index ea11f4c..be1b525 100644 --- a/lib/Target/PowerPC/CMakeLists.txt +++ b/lib/Target/PowerPC/CMakeLists.txt @@ -7,7 +7,7 @@ tablegen(PPCGenRegisterInfo.inc -gen-register-info) tablegen(PPCGenInstrInfo.inc -gen-instr-info) tablegen(PPCGenDAGISel.inc -gen-dag-isel) tablegen(PPCGenCallingConv.inc -gen-callingconv) -tablegen(PPCGenSubtarget.inc -gen-subtarget) +tablegen(PPCGenSubtargetInfo.inc -gen-subtarget) add_llvm_target(PowerPCCodeGen PPCAsmBackend.cpp diff --git a/lib/Target/PowerPC/Makefile b/lib/Target/PowerPC/Makefile index 2a18db7..11abb97 100644 --- a/lib/Target/PowerPC/Makefile +++ b/lib/Target/PowerPC/Makefile @@ -15,7 +15,7 @@ TARGET = PPC BUILT_SOURCES = PPCGenRegisterInfo.inc \ PPCGenAsmWriter.inc PPCGenCodeEmitter.inc \ PPCGenInstrInfo.inc PPCGenDAGISel.inc \ - PPCGenSubtarget.inc PPCGenCallingConv.inc \ + PPCGenSubtargetInfo.inc PPCGenCallingConv.inc \ PPCGenMCCodeEmitter.inc DIRS = InstPrinter TargetInfo diff --git a/lib/Target/PowerPC/PPCSubtarget.cpp b/lib/Target/PowerPC/PPCSubtarget.cpp index 8d622d7..75ee1c0 100644 --- a/lib/Target/PowerPC/PPCSubtarget.cpp +++ b/lib/Target/PowerPC/PPCSubtarget.cpp @@ -20,7 +20,7 @@ #define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_TARGET_DESC -#include "PPCGenSubtarget.inc" +#include "PPCGenSubtargetInfo.inc" using namespace llvm; diff --git a/lib/Target/PowerPC/PPCSubtarget.h b/lib/Target/PowerPC/PPCSubtarget.h index 2e97707..33b21db 100644 --- a/lib/Target/PowerPC/PPCSubtarget.h +++ b/lib/Target/PowerPC/PPCSubtarget.h @@ -20,7 +20,7 @@ #include <string> #define GET_SUBTARGETINFO_HEADER -#include "PPCGenSubtarget.inc" +#include "PPCGenSubtargetInfo.inc" // GCC #defines PPC on Linux but we use it as our namespace name #undef PPC diff --git a/lib/Target/Sparc/CMakeLists.txt b/lib/Target/Sparc/CMakeLists.txt index f3c691f..e1f54fb 100644 --- a/lib/Target/Sparc/CMakeLists.txt +++ b/lib/Target/Sparc/CMakeLists.txt @@ -4,7 +4,7 @@ tablegen(SparcGenRegisterInfo.inc -gen-register-info) tablegen(SparcGenInstrInfo.inc -gen-instr-info) tablegen(SparcGenAsmWriter.inc -gen-asm-writer) tablegen(SparcGenDAGISel.inc -gen-dag-isel) -tablegen(SparcGenSubtarget.inc -gen-subtarget) +tablegen(SparcGenSubtargetInfo.inc -gen-subtarget) tablegen(SparcGenCallingConv.inc -gen-callingconv) add_llvm_target(SparcCodeGen diff --git a/lib/Target/Sparc/Makefile b/lib/Target/Sparc/Makefile index c8741b5..89f5053 100644 --- a/lib/Target/Sparc/Makefile +++ b/lib/Target/Sparc/Makefile @@ -13,8 +13,8 @@ TARGET = Sparc # Make sure that tblgen is run, first thing. BUILT_SOURCES = SparcGenRegisterInfo.inc SparcGenInstrInfo.inc \ - SparcGenAsmWriter.inc \ - SparcGenDAGISel.inc SparcGenSubtarget.inc SparcGenCallingConv.inc + SparcGenAsmWriter.inc SparcGenDAGISel.inc \ + SparcGenSubtargetInfo.inc SparcGenCallingConv.inc DIRS = TargetInfo diff --git a/lib/Target/Sparc/SparcSubtarget.cpp b/lib/Target/Sparc/SparcSubtarget.cpp index 3037b44..ee3cc03 100644 --- a/lib/Target/Sparc/SparcSubtarget.cpp +++ b/lib/Target/Sparc/SparcSubtarget.cpp @@ -16,7 +16,7 @@ #define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_TARGET_DESC -#include "SparcGenSubtarget.inc" +#include "SparcGenSubtargetInfo.inc" using namespace llvm; diff --git a/lib/Target/Sparc/SparcSubtarget.h b/lib/Target/Sparc/SparcSubtarget.h index 48cf2d4..257f22a 100644 --- a/lib/Target/Sparc/SparcSubtarget.h +++ b/lib/Target/Sparc/SparcSubtarget.h @@ -18,7 +18,7 @@ #include <string> #define GET_SUBTARGETINFO_HEADER -#include "SparcGenSubtarget.inc" +#include "SparcGenSubtargetInfo.inc" namespace llvm { diff --git a/lib/Target/SystemZ/CMakeLists.txt b/lib/Target/SystemZ/CMakeLists.txt index 47c7a9f..12206b9 100644 --- a/lib/Target/SystemZ/CMakeLists.txt +++ b/lib/Target/SystemZ/CMakeLists.txt @@ -5,7 +5,7 @@ tablegen(SystemZGenInstrInfo.inc -gen-instr-info) tablegen(SystemZGenAsmWriter.inc -gen-asm-writer) tablegen(SystemZGenDAGISel.inc -gen-dag-isel) tablegen(SystemZGenCallingConv.inc -gen-callingconv) -tablegen(SystemZGenSubtarget.inc -gen-subtarget) +tablegen(SystemZGenSubtargetInfo.inc -gen-subtarget) add_llvm_target(SystemZCodeGen SystemZAsmPrinter.cpp diff --git a/lib/Target/SystemZ/Makefile b/lib/Target/SystemZ/Makefile index 682f343..fa59dc6 100644 --- a/lib/Target/SystemZ/Makefile +++ b/lib/Target/SystemZ/Makefile @@ -13,8 +13,8 @@ TARGET = SystemZ # Make sure that tblgen is run, first thing. BUILT_SOURCES = SystemZGenRegisterInfo.inc SystemZGenInstrInfo.inc \ - SystemZGenAsmWriter.inc \ - SystemZGenDAGISel.inc SystemZGenSubtarget.inc SystemZGenCallingConv.inc + SystemZGenAsmWriter.inc SystemZGenDAGISel.inc \ + SystemZGenSubtargetInfo.inc SystemZGenCallingConv.inc DIRS = TargetInfo diff --git a/lib/Target/SystemZ/SystemZSubtarget.cpp b/lib/Target/SystemZ/SystemZSubtarget.cpp index 438d4fe..4388109 100644 --- a/lib/Target/SystemZ/SystemZSubtarget.cpp +++ b/lib/Target/SystemZ/SystemZSubtarget.cpp @@ -19,7 +19,7 @@ #define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_TARGET_DESC -#include "SystemZGenSubtarget.inc" +#include "SystemZGenSubtargetInfo.inc" using namespace llvm; diff --git a/lib/Target/SystemZ/SystemZSubtarget.h b/lib/Target/SystemZ/SystemZSubtarget.h index 9bf1f08..6ac606a 100644 --- a/lib/Target/SystemZ/SystemZSubtarget.h +++ b/lib/Target/SystemZ/SystemZSubtarget.h @@ -18,7 +18,7 @@ #include <string> #define GET_SUBTARGETINFO_HEADER -#include "SystemZGenSubtarget.inc" +#include "SystemZGenSubtargetInfo.inc" namespace llvm { class GlobalValue; diff --git a/lib/Target/X86/CMakeLists.txt b/lib/Target/X86/CMakeLists.txt index 50464e8..633d982 100644 --- a/lib/Target/X86/CMakeLists.txt +++ b/lib/Target/X86/CMakeLists.txt @@ -9,7 +9,7 @@ tablegen(X86GenAsmMatcher.inc -gen-asm-matcher) tablegen(X86GenDAGISel.inc -gen-dag-isel) tablegen(X86GenFastISel.inc -gen-fast-isel) tablegen(X86GenCallingConv.inc -gen-callingconv) -tablegen(X86GenSubtarget.inc -gen-subtarget) +tablegen(X86GenSubtargetInfo.inc -gen-subtarget) tablegen(X86GenEDInfo.inc -gen-enhanced-disassembly-info) set(sources diff --git a/lib/Target/X86/MCTargetDesc/X86TargetDesc.cpp b/lib/Target/X86/MCTargetDesc/X86TargetDesc.cpp index b55cfdc..c7c37f6 100644 --- a/lib/Target/X86/MCTargetDesc/X86TargetDesc.cpp +++ b/lib/Target/X86/MCTargetDesc/X86TargetDesc.cpp @@ -24,7 +24,7 @@ #include "X86GenInstrInfo.inc" #define GET_SUBTARGETINFO_MC_DESC -#include "X86GenSubtarget.inc" +#include "X86GenSubtargetInfo.inc" using namespace llvm; diff --git a/lib/Target/X86/Makefile b/lib/Target/X86/Makefile index 25da367..949661e 100644 --- a/lib/Target/X86/Makefile +++ b/lib/Target/X86/Makefile @@ -16,7 +16,7 @@ BUILT_SOURCES = X86GenRegisterInfo.inc X86GenInstrInfo.inc \ X86GenAsmWriter.inc X86GenAsmMatcher.inc \ X86GenAsmWriter1.inc X86GenDAGISel.inc \ X86GenDisassemblerTables.inc X86GenFastISel.inc \ - X86GenCallingConv.inc X86GenSubtarget.inc \ + X86GenCallingConv.inc X86GenSubtargetInfo.inc \ X86GenEDInfo.inc DIRS = InstPrinter AsmParser Disassembler TargetInfo MCTargetDesc Utils diff --git a/lib/Target/X86/X86Subtarget.cpp b/lib/Target/X86/X86Subtarget.cpp index 46b50cc..a1e6d7b 100644 --- a/lib/Target/X86/X86Subtarget.cpp +++ b/lib/Target/X86/X86Subtarget.cpp @@ -24,7 +24,7 @@ #define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_TARGET_DESC -#include "X86GenSubtarget.inc" +#include "X86GenSubtargetInfo.inc" using namespace llvm; diff --git a/lib/Target/X86/X86Subtarget.h b/lib/Target/X86/X86Subtarget.h index e26e53c..d49b871 100644 --- a/lib/Target/X86/X86Subtarget.h +++ b/lib/Target/X86/X86Subtarget.h @@ -20,7 +20,7 @@ #include <string> #define GET_SUBTARGETINFO_HEADER -#include "X86GenSubtarget.inc" +#include "X86GenSubtargetInfo.inc" namespace llvm { class GlobalValue; diff --git a/lib/Target/XCore/CMakeLists.txt b/lib/Target/XCore/CMakeLists.txt index 358141c..59c7f51 100644 --- a/lib/Target/XCore/CMakeLists.txt +++ b/lib/Target/XCore/CMakeLists.txt @@ -5,7 +5,7 @@ tablegen(XCoreGenInstrInfo.inc -gen-instr-info) tablegen(XCoreGenAsmWriter.inc -gen-asm-writer) tablegen(XCoreGenDAGISel.inc -gen-dag-isel) tablegen(XCoreGenCallingConv.inc -gen-callingconv) -tablegen(XCoreGenSubtarget.inc -gen-subtarget) +tablegen(XCoreGenSubtargetInfo.inc -gen-subtarget) add_llvm_target(XCoreCodeGen XCoreAsmPrinter.cpp diff --git a/lib/Target/XCore/Makefile b/lib/Target/XCore/Makefile index ec6fb4c..a9d9fee 100644 --- a/lib/Target/XCore/Makefile +++ b/lib/Target/XCore/Makefile @@ -15,7 +15,7 @@ TARGET = XCore BUILT_SOURCES = XCoreGenRegisterInfo.inc XCoreGenInstrInfo.inc \ XCoreGenAsmWriter.inc \ XCoreGenDAGISel.inc XCoreGenCallingConv.inc \ - XCoreGenSubtarget.inc + XCoreGenSubtargetInfo.inc DIRS = TargetInfo diff --git a/lib/Target/XCore/XCoreSubtarget.cpp b/lib/Target/XCore/XCoreSubtarget.cpp index d6e2e8a..6485c4e 100644 --- a/lib/Target/XCore/XCoreSubtarget.cpp +++ b/lib/Target/XCore/XCoreSubtarget.cpp @@ -17,7 +17,7 @@ #define GET_SUBTARGETINFO_CTOR #define GET_SUBTARGETINFO_MC_DESC #define GET_SUBTARGETINFO_TARGET_DESC -#include "XCoreGenSubtarget.inc" +#include "XCoreGenSubtargetInfo.inc" using namespace llvm; diff --git a/lib/Target/XCore/XCoreSubtarget.h b/lib/Target/XCore/XCoreSubtarget.h index 6f7043f..2e52571 100644 --- a/lib/Target/XCore/XCoreSubtarget.h +++ b/lib/Target/XCore/XCoreSubtarget.h @@ -19,7 +19,7 @@ #include <string> #define GET_SUBTARGETINFO_HEADER -#include "XCoreGenSubtarget.inc" +#include "XCoreGenSubtargetInfo.inc" namespace llvm { |