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-rw-r--r--lib/CodeGen/SelectionDAG/FastISel.cpp51
-rw-r--r--lib/CodeGen/SelectionDAG/LegalizeDAG.cpp33
-rw-r--r--lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp36
-rw-r--r--lib/CodeGen/VirtRegMap.cpp2
-rw-r--r--lib/Target/X86/X86RegisterInfo.cpp10
5 files changed, 19 insertions, 113 deletions
diff --git a/lib/CodeGen/SelectionDAG/FastISel.cpp b/lib/CodeGen/SelectionDAG/FastISel.cpp
index fb3d101..3705f45 100644
--- a/lib/CodeGen/SelectionDAG/FastISel.cpp
+++ b/lib/CodeGen/SelectionDAG/FastISel.cpp
@@ -323,32 +323,21 @@ bool FastISel::SelectCall(User *I) {
CU.getFilename());
unsigned Line = SPI->getLine();
unsigned Col = SPI->getColumn();
- unsigned ID = DW->RecordSourceLine(Line, Col, SrcFile);
unsigned Idx = MF.getOrCreateDebugLocID(SrcFile, Line, Col);
setCurDebugLoc(DebugLoc::get(Idx));
- const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL);
- BuildMI(MBB, DL, II).addImm(ID);
}
return true;
}
case Intrinsic::dbg_region_start: {
DbgRegionStartInst *RSI = cast<DbgRegionStartInst>(I);
- if (DW && DW->ValidDebugInfo(RSI->getContext())) {
- unsigned ID =
- DW->RecordRegionStart(cast<GlobalVariable>(RSI->getContext()));
- const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL);
- BuildMI(MBB, DL, II).addImm(ID);
- }
+ if (DW && DW->ValidDebugInfo(RSI->getContext()))
+ DW->RecordRegionStart(cast<GlobalVariable>(RSI->getContext()));
return true;
}
case Intrinsic::dbg_region_end: {
DbgRegionEndInst *REI = cast<DbgRegionEndInst>(I);
- if (DW && DW->ValidDebugInfo(REI->getContext())) {
- unsigned ID =
- DW->RecordRegionEnd(cast<GlobalVariable>(REI->getContext()));
- const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL);
- BuildMI(MBB, DL, II).addImm(ID);
- }
+ if (DW && DW->ValidDebugInfo(REI->getContext()))
+ DW->RecordRegionEnd(cast<GlobalVariable>(REI->getContext()));
return true;
}
case Intrinsic::dbg_func_start: {
@@ -368,42 +357,14 @@ bool FastISel::SelectCall(User *I) {
// function start. It will be emitted at asm emission time. However,
// create a label if this is a beginning of inlined function.
unsigned Line = Subprogram.getLineNumber();
- unsigned LabelID = DW->RecordSourceLine(Line, 0, SrcFile);
setCurDebugLoc(DebugLoc::get(MF.getOrCreateDebugLocID(SrcFile, Line, 0)));
-
- if (DW->getRecordSourceLineCount() != 1) {
- const TargetInstrDesc &II = TII.get(TargetInstrInfo::DBG_LABEL);
- BuildMI(MBB, DL, II).addImm(LabelID);
- }
}
return true;
}
- case Intrinsic::dbg_declare: {
- DbgDeclareInst *DI = cast<DbgDeclareInst>(I);
- Value *Variable = DI->getVariable();
- if (DW && DW->ValidDebugInfo(Variable)) {
- // Determine the address of the declared object.
- Value *Address = DI->getAddress();
- if (BitCastInst *BCI = dyn_cast<BitCastInst>(Address))
- Address = BCI->getOperand(0);
- AllocaInst *AI = dyn_cast<AllocaInst>(Address);
- // Don't handle byval struct arguments or VLAs, for example.
- if (!AI) break;
- DenseMap<const AllocaInst*, int>::iterator SI =
- StaticAllocaMap.find(AI);
- if (SI == StaticAllocaMap.end()) break; // VLAs.
- int FI = SI->second;
-
- // Determine the debug globalvariable.
- GlobalValue *GV = cast<GlobalVariable>(Variable);
-
- // Build the DECLARE instruction.
- const TargetInstrDesc &II = TII.get(TargetInstrInfo::DECLARE);
- BuildMI(MBB, DL, II).addFrameIndex(FI).addGlobalAddress(GV);
- }
+ case Intrinsic::dbg_declare:
+ // FIXME: Do something correct here when declare stuff is working again.
return true;
- }
case Intrinsic::eh_exception: {
MVT VT = TLI.getValueType(I->getType());
switch (TLI.getOperationAction(ISD::EXCEPTIONADDR, VT)) {
diff --git a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
index e5a30c8..8cba55f 100644
--- a/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
+++ b/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
@@ -1274,38 +1274,9 @@ SDValue SelectionDAGLegalize::LegalizeOp(SDValue Op) {
switch (TLI.getOperationAction(ISD::DBG_STOPPOINT, MVT::Other)) {
case TargetLowering::Promote:
default: assert(0 && "This action is not supported yet!");
- case TargetLowering::Expand: {
- DwarfWriter *DW = DAG.getDwarfWriter();
- bool useDEBUG_LOC = TLI.isOperationLegalOrCustom(ISD::DEBUG_LOC,
- MVT::Other);
- bool useLABEL = TLI.isOperationLegalOrCustom(ISD::DBG_LABEL, MVT::Other);
-
- const DbgStopPointSDNode *DSP = cast<DbgStopPointSDNode>(Node);
- GlobalVariable *CU_GV = cast<GlobalVariable>(DSP->getCompileUnit());
- if (DW && (useDEBUG_LOC || useLABEL) && !CU_GV->isDeclaration()) {
- DICompileUnit CU(cast<GlobalVariable>(DSP->getCompileUnit()));
- unsigned SrcFile = DW->RecordSource(CU.getDirectory(),
- CU.getFilename());
-
- unsigned Line = DSP->getLine();
- unsigned Col = DSP->getColumn();
-
- // A bit self-referential to have DebugLoc on Debug_Loc nodes, but
- // it won't hurt anything.
- if (useDEBUG_LOC) {
- SDValue Ops[] = { Tmp1, DAG.getConstant(Line, MVT::i32),
- DAG.getConstant(Col, MVT::i32),
- DAG.getConstant(SrcFile, MVT::i32) };
- Result = DAG.getNode(ISD::DEBUG_LOC, dl, MVT::Other, Ops, 4);
- } else {
- unsigned ID = DW->RecordSourceLine(Line, Col, SrcFile);
- Result = DAG.getLabel(ISD::DBG_LABEL, dl, Tmp1, ID);
- }
- } else {
- Result = Tmp1; // chain
- }
+ case TargetLowering::Expand:
+ Result = Tmp1; // chain
break;
- }
case TargetLowering::Legal: {
LegalizeAction Action = getTypeAction(Node->getOperand(1).getValueType());
if (Action == Legal && Tmp1 == Node->getOperand(0))
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
index 47335d3..0918e6c 100644
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuild.cpp
@@ -3912,24 +3912,18 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
case Intrinsic::dbg_region_start: {
DwarfWriter *DW = DAG.getDwarfWriter();
DbgRegionStartInst &RSI = cast<DbgRegionStartInst>(I);
- if (DW && DW->ValidDebugInfo(RSI.getContext())) {
- unsigned LabelID =
- DW->RecordRegionStart(cast<GlobalVariable>(RSI.getContext()));
- DAG.setRoot(DAG.getLabel(ISD::DBG_LABEL, getCurDebugLoc(),
- getRoot(), LabelID));
- }
+
+ if (DW && DW->ValidDebugInfo(RSI.getContext()))
+ DW->RecordRegionStart(cast<GlobalVariable>(RSI.getContext()));
return 0;
}
case Intrinsic::dbg_region_end: {
DwarfWriter *DW = DAG.getDwarfWriter();
DbgRegionEndInst &REI = cast<DbgRegionEndInst>(I);
- if (DW && DW->ValidDebugInfo(REI.getContext())) {
- unsigned LabelID =
- DW->RecordRegionEnd(cast<GlobalVariable>(REI.getContext()));
- DAG.setRoot(DAG.getLabel(ISD::DBG_LABEL, getCurDebugLoc(),
- getRoot(), LabelID));
- }
+
+ if (DW && DW->ValidDebugInfo(REI.getContext()))
+ DW->RecordRegionEnd(cast<GlobalVariable>(REI.getContext()));
return 0;
}
@@ -3950,27 +3944,15 @@ SelectionDAGLowering::visitIntrinsicCall(CallInst &I, unsigned Intrinsic) {
// function start. It will be emitted at asm emission time. However,
// create a label if this is a beginning of inlined function.
unsigned Line = Subprogram.getLineNumber();
- unsigned LabelID = DW->RecordSourceLine(Line, 0, SrcFile);
-
- if (DW->getRecordSourceLineCount() != 1)
- DAG.setRoot(DAG.getLabel(ISD::DBG_LABEL, getCurDebugLoc(),
- getRoot(), LabelID));
-
setCurDebugLoc(DebugLoc::get(DAG.getMachineFunction().
- getOrCreateDebugLocID(SrcFile, Line, 0)));
+ getOrCreateDebugLocID(SrcFile, Line, 0)));
}
return 0;
}
- case Intrinsic::dbg_declare: {
- DwarfWriter *DW = DAG.getDwarfWriter();
- DbgDeclareInst &DI = cast<DbgDeclareInst>(I);
- Value *Variable = DI.getVariable();
- if (DW && DW->ValidDebugInfo(Variable))
- DAG.setRoot(DAG.getNode(ISD::DECLARE, dl, MVT::Other, getRoot(),
- getValue(DI.getAddress()), getValue(Variable)));
+ case Intrinsic::dbg_declare:
+ // FIXME: Do something correct here when declare stuff is working again.
return 0;
- }
case Intrinsic::eh_exception: {
if (!CurMBB->isLandingPad()) {
diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp
index f288dcc..f758cc6 100644
--- a/lib/CodeGen/VirtRegMap.cpp
+++ b/lib/CodeGen/VirtRegMap.cpp
@@ -1278,7 +1278,7 @@ void LocalSpiller::TransferDeadness(MachineBasicBlock *MBB, unsigned CurDist,
}
/// rewriteMBB - Keep track of which spills are available even after the
-/// register allocator is done with them. If possible, avid reloading vregs.
+/// register allocator is done with them. If possible, avoid reloading vregs.
void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM,
AvailableSpills &Spills) {
DOUT << "\n**** Local spiller rewriting MBB '"
diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp
index 0130ba2..80a4f46 100644
--- a/lib/Target/X86/X86RegisterInfo.cpp
+++ b/lib/Target/X86/X86RegisterInfo.cpp
@@ -785,12 +785,6 @@ void X86RegisterInfo::emitPrologue(MachineFunction &MF) const {
BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64r : X86::PUSH32r))
.addReg(FramePtr, /*isDef=*/false, /*isImp=*/false, /*isKill=*/true);
- if (needsFrameMoves) {
- // Mark effective beginning of when frame pointer becomes valid.
- FrameLabelId = MMI->NextLabelID();
- BuildMI(MBB, MBBI, DL, TII.get(X86::DBG_LABEL)).addImm(FrameLabelId);
- }
-
// Update EBP with the new base value...
BuildMI(MBB, MBBI, DL,
TII.get(Is64Bit ? X86::MOV64rr : X86::MOV32rr), FramePtr)
@@ -814,11 +808,9 @@ void X86RegisterInfo::emitPrologue(MachineFunction &MF) const {
NumBytes = StackSize - X86FI->getCalleeSavedFrameSize();
unsigned ReadyLabelId = 0;
- if (needsFrameMoves) {
+ if (needsFrameMoves)
// Mark effective beginning of when frame pointer is ready.
ReadyLabelId = MMI->NextLabelID();
- BuildMI(MBB, MBBI, DL, TII.get(X86::DBG_LABEL)).addImm(ReadyLabelId);
- }
// Skip the callee-saved push instructions.
while (MBBI != MBB.end() &&
generated by cgit v1.1 at 2024-09-12 08:13:18 +0000