diff options
-rw-r--r-- | include/llvm/AddressingMode.h | 41 | ||||
-rw-r--r-- | include/llvm/Target/TargetLowering.h | 17 | ||||
-rw-r--r-- | lib/CodeGen/BasicTargetTransformInfo.cpp | 2 | ||||
-rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 2 | ||||
-rw-r--r-- | lib/Transforms/Scalar/CodeGenPrepare.cpp | 2 |
5 files changed, 19 insertions, 45 deletions
diff --git a/include/llvm/AddressingMode.h b/include/llvm/AddressingMode.h deleted file mode 100644 index 70b3c05..0000000 --- a/include/llvm/AddressingMode.h +++ /dev/null @@ -1,41 +0,0 @@ -//===--------- llvm/AddressingMode.h - Addressing Mode -------*- C++ -*-===// -// -// The LLVM Compiler Infrastructure -// -// This file is distributed under the University of Illinois Open Source -// License. See LICENSE.TXT for details. -// -//===----------------------------------------------------------------------===// -// This file contains addressing mode data structures which are shared -// between LSR and a number of places in the codegen. -// -//===----------------------------------------------------------------------===// - -#ifndef LLVM_ADDRESSING_MODE_H -#define LLVM_ADDRESSING_MODE_H - -#include "llvm/Support/DataTypes.h" - -namespace llvm { - -class GlobalValue; - -/// AddrMode - This represents an addressing mode of: -/// BaseGV + BaseOffs + BaseReg + Scale*ScaleReg -/// If BaseGV is null, there is no BaseGV. -/// If BaseOffs is zero, there is no base offset. -/// If HasBaseReg is false, there is no base register. -/// If Scale is zero, there is no ScaleReg. Scale of 1 indicates a reg with -/// no scale. -/// -struct AddrMode { - GlobalValue *BaseGV; - int64_t BaseOffs; - bool HasBaseReg; - int64_t Scale; - AddrMode() : BaseGV(0), BaseOffs(0), HasBaseReg(false), Scale(0) {} -}; - -} // End llvm namespace - -#endif diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h index 8359a5c..eee25c9 100644 --- a/include/llvm/Target/TargetLowering.h +++ b/include/llvm/Target/TargetLowering.h @@ -23,7 +23,6 @@ #define LLVM_TARGET_TARGETLOWERING_H #include "llvm/ADT/DenseMap.h" -#include "llvm/AddressingMode.h" #include "llvm/CodeGen/DAGCombine.h" #include "llvm/CodeGen/RuntimeLibcalls.h" #include "llvm/CodeGen/SelectionDAGNodes.h" @@ -1698,6 +1697,22 @@ public: return false; } + /// AddrMode - This represents an addressing mode of: + /// BaseGV + BaseOffs + BaseReg + Scale*ScaleReg + /// If BaseGV is null, there is no BaseGV. + /// If BaseOffs is zero, there is no base offset. + /// If HasBaseReg is false, there is no base register. + /// If Scale is zero, there is no ScaleReg. Scale of 1 indicates a reg with + /// no scale. + /// + struct AddrMode { + GlobalValue *BaseGV; + int64_t BaseOffs; + bool HasBaseReg; + int64_t Scale; + AddrMode() : BaseGV(0), BaseOffs(0), HasBaseReg(false), Scale(0) {} + }; + /// isLegalAddressingMode - Return true if the addressing mode represented by /// AM is legal for this target, for a load/store of the specified type. /// The type may be VoidTy, in which case only return true if the addressing diff --git a/lib/CodeGen/BasicTargetTransformInfo.cpp b/lib/CodeGen/BasicTargetTransformInfo.cpp index 29f5260..c27e081 100644 --- a/lib/CodeGen/BasicTargetTransformInfo.cpp +++ b/lib/CodeGen/BasicTargetTransformInfo.cpp @@ -126,7 +126,7 @@ bool BasicTTI::isLegalICmpImmediate(int64_t imm) const { bool BasicTTI::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg, int64_t Scale) const { - AddrMode AM; + TargetLowering::AddrMode AM; AM.BaseGV = BaseGV; AM.BaseOffs = BaseOffset; AM.HasBaseReg = HasBaseReg; diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index b7a5f29..ff00d0d 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -6825,7 +6825,7 @@ static bool canFoldInAddressingMode(SDNode *N, SDNode *Use, } else return false; - AddrMode AM; + TargetLowering::AddrMode AM; if (N->getOpcode() == ISD::ADD) { ConstantSDNode *Offset = dyn_cast<ConstantSDNode>(N->getOperand(1)); if (Offset) diff --git a/lib/Transforms/Scalar/CodeGenPrepare.cpp b/lib/Transforms/Scalar/CodeGenPrepare.cpp index f239553..d513c96 100644 --- a/lib/Transforms/Scalar/CodeGenPrepare.cpp +++ b/lib/Transforms/Scalar/CodeGenPrepare.cpp @@ -823,7 +823,7 @@ namespace { /// ExtAddrMode - This is an extended version of TargetLowering::AddrMode /// which holds actual Value*'s for register values. -struct ExtAddrMode : public AddrMode { +struct ExtAddrMode : public TargetLowering::AddrMode { Value *BaseReg; Value *ScaledReg; ExtAddrMode() : BaseReg(0), ScaledReg(0) {} |