diff options
| -rw-r--r-- | lib/Target/X86/X86ISelDAGToDAG.cpp | 15 | ||||
| -rw-r--r-- | test/CodeGen/X86/h-registers-2.ll | 15 |
2 files changed, 29 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelDAGToDAG.cpp b/lib/Target/X86/X86ISelDAGToDAG.cpp index 41a3c41..18a574f 100644 --- a/lib/Target/X86/X86ISelDAGToDAG.cpp +++ b/lib/Target/X86/X86ISelDAGToDAG.cpp @@ -1049,6 +1049,9 @@ bool X86DAGToDAGISel::MatchAddress(SDValue N, X86ISelAddressMode &AM, X, Eight); SDValue And = CurDAG->getNode(ISD::AND, dl, N.getValueType(), Srl, Mask); + SDValue ShlCount = CurDAG->getConstant(ScaleLog, MVT::i8); + SDValue Shl = CurDAG->getNode(ISD::SHL, dl, N.getValueType(), + And, ShlCount); // Insert the new nodes into the topological ordering. if (Eight.getNode()->getNodeId() == -1 || @@ -1071,7 +1074,17 @@ bool X86DAGToDAGISel::MatchAddress(SDValue N, X86ISelAddressMode &AM, CurDAG->RepositionNode(N.getNode(), And.getNode()); And.getNode()->setNodeId(N.getNode()->getNodeId()); } - CurDAG->ReplaceAllUsesWith(N, And); + if (ShlCount.getNode()->getNodeId() == -1 || + ShlCount.getNode()->getNodeId() > X.getNode()->getNodeId()) { + CurDAG->RepositionNode(X.getNode(), ShlCount.getNode()); + ShlCount.getNode()->setNodeId(N.getNode()->getNodeId()); + } + if (Shl.getNode()->getNodeId() == -1 || + Shl.getNode()->getNodeId() > N.getNode()->getNodeId()) { + CurDAG->RepositionNode(N.getNode(), Shl.getNode()); + Shl.getNode()->setNodeId(N.getNode()->getNodeId()); + } + CurDAG->ReplaceAllUsesWith(N, Shl); AM.IndexReg = And; AM.Scale = (1 << ScaleLog); return false; diff --git a/test/CodeGen/X86/h-registers-2.ll b/test/CodeGen/X86/h-registers-2.ll new file mode 100644 index 0000000..12236a2 --- /dev/null +++ b/test/CodeGen/X86/h-registers-2.ll @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc -march=x86 > %t +; grep {movzbl %\[abcd\]h,} %t | count 1 +; grep {shll \$3,} | count 1 + +; Use an h register, but don't omit the explicit shift for +; non-address use(s). + +define i32 @foo(i8* %x, i32 %y) nounwind { + %t0 = lshr i32 %y, 8 ; <i32> [#uses=1] + %t1 = and i32 %t0, 255 ; <i32> [#uses=2] + %t2 = shl i32 %t1, 3 + %t3 = getelementptr i8* %x, i32 %t2 ; <i8*> [#uses=1] + store i8 77, i8* %t3, align 4 + ret i32 %t2 +} |