diff options
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 1d71891..6a65614 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -531,6 +531,8 @@ X86TargetLowering::LowerCCCCallTo(SDOperand Chain, const Type *RetTy, case MVT::i8: RetVal = DAG.getCopyFromReg(Chain, X86::AL, MVT::i8, InFlag); Chain = RetVal.getValue(1); + if (RetTyVT == MVT::i1) + RetVal = DAG.getNode(ISD::TRUNCATE, MVT::i1, RetVal); break; case MVT::i16: RetVal = DAG.getCopyFromReg(Chain, X86::AX, MVT::i16, InFlag); @@ -1057,6 +1059,8 @@ X86TargetLowering::LowerFastCCCallTo(SDOperand Chain, const Type *RetTy, case MVT::i8: RetVal = DAG.getCopyFromReg(Chain, X86::AL, MVT::i8, InFlag); Chain = RetVal.getValue(1); + if (RetTyVT == MVT::i1) + RetVal = DAG.getNode(ISD::TRUNCATE, MVT::i1, RetVal); break; case MVT::i16: RetVal = DAG.getCopyFromReg(Chain, X86::AX, MVT::i16, InFlag); |