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-rw-r--r--include/llvm/Target/Target.td11
-rw-r--r--utils/TableGen/CodeGenRegisters.h1
-rw-r--r--utils/TableGen/CodeGenTarget.cpp2
3 files changed, 0 insertions, 14 deletions
diff --git a/include/llvm/Target/Target.td b/include/llvm/Target/Target.td
index ea0335c..68f0515 100644
--- a/include/llvm/Target/Target.td
+++ b/include/llvm/Target/Target.td
@@ -32,17 +32,6 @@ class Register<string n> {
string Namespace = "";
string AsmName = n;
- // SpillSize - If this value is set to a non-zero value, it is the size in
- // bits of the spill slot required to hold this register. If this value is
- // set to zero, the information is inferred from any register classes the
- // register belongs to.
- int SpillSize = 0;
-
- // SpillAlignment - This value is used to specify the alignment required for
- // spilling the register. Like SpillSize, this should only be explicitly
- // specified if the register is not in a register class.
- int SpillAlignment = 0;
-
// Aliases - A list of registers that this register overlaps with. A read or
// modification of this register can potentially read or modify the aliased
// registers.
diff --git a/utils/TableGen/CodeGenRegisters.h b/utils/TableGen/CodeGenRegisters.h
index 1a876e1..39b92c5 100644
--- a/utils/TableGen/CodeGenRegisters.h
+++ b/utils/TableGen/CodeGenRegisters.h
@@ -29,7 +29,6 @@ namespace llvm {
struct CodeGenRegister {
Record *TheDef;
const std::string &getName() const;
- unsigned DeclaredSpillSize, DeclaredSpillAlignment;
unsigned EnumValue;
unsigned CostPerUse;
CodeGenRegister(Record *R);
diff --git a/utils/TableGen/CodeGenTarget.cpp b/utils/TableGen/CodeGenTarget.cpp
index c9ccb96..57f7fdc 100644
--- a/utils/TableGen/CodeGenTarget.cpp
+++ b/utils/TableGen/CodeGenTarget.cpp
@@ -170,8 +170,6 @@ void CodeGenTarget::ReadRegisters() const {
}
CodeGenRegister::CodeGenRegister(Record *R) : TheDef(R) {
- DeclaredSpillSize = R->getValueAsInt("SpillSize");
- DeclaredSpillAlignment = R->getValueAsInt("SpillAlignment");
CostPerUse = R->getValueAsInt("CostPerUse");
}