diff options
| -rw-r--r-- | docs/CodeGenerator.html | 4 | ||||
| -rw-r--r-- | include/llvm/MC/MCStreamer.h | 2 | ||||
| -rw-r--r-- | include/llvm/Target/TargetLowering.h | 8 |
3 files changed, 7 insertions, 7 deletions
diff --git a/docs/CodeGenerator.html b/docs/CodeGenerator.html index 0568667..1159a6c 100644 --- a/docs/CodeGenerator.html +++ b/docs/CodeGenerator.html @@ -1090,8 +1090,8 @@ def FADDS : AForm_2<59, 21, <p>The portion of the instruction definition in bold indicates the pattern used to match the instruction. The DAG operators (like <tt>fmul</tt>/<tt>fadd</tt>) are defined in - the <tt>lib/Target/TargetSelectionDAG.td</tt> file. "<tt>F4RC</tt>" is the - register class of the input and result values.</p> + the <tt>include/llvm/Target/TargetSelectionDAG.td</tt> file. " + <tt>F4RC</tt>" is the register class of the input and result values.</p> <p>The TableGen DAG instruction selector generator reads the instruction patterns in the <tt>.td</tt> file and automatically builds parts of the diff --git a/include/llvm/MC/MCStreamer.h b/include/llvm/MC/MCStreamer.h index 4b088a5..ce67b3a 100644 --- a/include/llvm/MC/MCStreamer.h +++ b/include/llvm/MC/MCStreamer.h @@ -88,7 +88,7 @@ class TargetAsmBackend; /// @name Symbol & Section Management /// @{ - /// getCurrentSection - Return the current seciton that the streamer is + /// getCurrentSection - Return the current section that the streamer is /// emitting code to. const MCSection *getCurrentSection() const { return CurSection; } diff --git a/include/llvm/Target/TargetLowering.h b/include/llvm/Target/TargetLowering.h index 2de5f62..dd04785 100644 --- a/include/llvm/Target/TargetLowering.h +++ b/include/llvm/Target/TargetLowering.h @@ -967,7 +967,7 @@ protected: } /// setLoadExtAction - Indicate that the specified load with extension does - /// not work with the with specified type and indicate what to do about it. + /// not work with the specified type and indicate what to do about it. void setLoadExtAction(unsigned ExtType, MVT VT, LegalizeAction Action) { assert((unsigned)VT.SimpleTy*2 < 63 && @@ -978,7 +978,7 @@ protected: } /// setTruncStoreAction - Indicate that the specified truncating store does - /// not work with the with specified type and indicate what to do about it. + /// not work with the specified type and indicate what to do about it. void setTruncStoreAction(MVT ValVT, MVT MemVT, LegalizeAction Action) { assert((unsigned)ValVT.SimpleTy < array_lengthof(TruncStoreActions) && @@ -989,7 +989,7 @@ protected: } /// setIndexedLoadAction - Indicate that the specified indexed load does or - /// does not work with the with specified type and indicate what to do abort + /// does not work with the specified type and indicate what to do abort /// it. NOTE: All indexed mode loads are initialized to Expand in /// TargetLowering.cpp void setIndexedLoadAction(unsigned IdxMode, MVT VT, @@ -1001,7 +1001,7 @@ protected: } /// setIndexedStoreAction - Indicate that the specified indexed store does or - /// does not work with the with specified type and indicate what to do about + /// does not work with the specified type and indicate what to do about /// it. NOTE: All indexed mode stores are initialized to Expand in /// TargetLowering.cpp void setIndexedStoreAction(unsigned IdxMode, MVT VT, |