diff options
| -rw-r--r-- | lib/Target/PowerPC/PPCFrameLowering.cpp | 12 | ||||
| -rw-r--r-- | test/CodeGen/PowerPC/unwind-dw2.ll | 15 |
2 files changed, 27 insertions, 0 deletions
diff --git a/lib/Target/PowerPC/PPCFrameLowering.cpp b/lib/Target/PowerPC/PPCFrameLowering.cpp index dc734d1..4c57cf6 100644 --- a/lib/Target/PowerPC/PPCFrameLowering.cpp +++ b/lib/Target/PowerPC/PPCFrameLowering.cpp @@ -1145,6 +1145,12 @@ PPCFrameLowering::spillCalleeSavedRegisters(MachineBasicBlock &MBB, for (unsigned i = 0, e = CSI.size(); i != e; ++i) { unsigned Reg = CSI[i].getReg(); + // Only Darwin actually uses the VRSAVE register, but it can still appear + // here if, for example, @llvm.eh.unwind.init() is used. If we're not on + // Darwin, ignore it. + if (Reg == PPC::VRSAVE && !Subtarget.isDarwinABI()) + continue; + // CR2 through CR4 are the nonvolatile CR fields. bool IsCRField = PPC::CR2 <= Reg && Reg <= PPC::CR4; @@ -1294,6 +1300,12 @@ PPCFrameLowering::restoreCalleeSavedRegisters(MachineBasicBlock &MBB, for (unsigned i = 0, e = CSI.size(); i != e; ++i) { unsigned Reg = CSI[i].getReg(); + // Only Darwin actually uses the VRSAVE register, but it can still appear + // here if, for example, @llvm.eh.unwind.init() is used. If we're not on + // Darwin, ignore it. + if (Reg == PPC::VRSAVE && !Subtarget.isDarwinABI()) + continue; + if (Reg == PPC::CR2) { CR2Spilled = true; // The spill slot is associated only with CR2, which is the diff --git a/test/CodeGen/PowerPC/unwind-dw2.ll b/test/CodeGen/PowerPC/unwind-dw2.ll new file mode 100644 index 0000000..e58edff --- /dev/null +++ b/test/CodeGen/PowerPC/unwind-dw2.ll @@ -0,0 +1,15 @@ +; RUN: llc < %s +target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64" +target triple = "powerpc64-unknown-linux-gnu" + +; Function Attrs: nounwind +define void @foo() #0 { +entry: + call void @llvm.eh.unwind.init() + ret void +} + +; Function Attrs: nounwind +declare void @llvm.eh.unwind.init() #0 + +attributes #0 = { nounwind } |