diff options
| -rw-r--r-- | lib/Target/X86/X86.h | 6 | ||||
| -rw-r--r-- | lib/Target/X86/X86TargetMachine.cpp | 14 |
2 files changed, 20 insertions, 0 deletions
diff --git a/lib/Target/X86/X86.h b/lib/Target/X86/X86.h index 3b5360e..c6d6a55 100644 --- a/lib/Target/X86/X86.h +++ b/lib/Target/X86/X86.h @@ -23,6 +23,12 @@ class TargetMachine; class FunctionPass; class IntrinsicLowering; +enum X86VectorEnum { + NoSSE, SSE, SSE2, SSE3 +}; + +extern X86VectorEnum X86Vector; + /// createX86SimpleInstructionSelector - This pass converts an LLVM function /// into a machine code representation in a very simple peep-hole fashion. The /// generated code sucks but the implementation is nice and simple. diff --git a/lib/Target/X86/X86TargetMachine.cpp b/lib/Target/X86/X86TargetMachine.cpp index 51ba378..1a9e978 100644 --- a/lib/Target/X86/X86TargetMachine.cpp +++ b/lib/Target/X86/X86TargetMachine.cpp @@ -25,6 +25,8 @@ #include "Support/Statistic.h" using namespace llvm; +X86VectorEnum llvm::X86Vector = NoSSE; + namespace { cl::opt<bool> NoSSAPeephole("disable-ssa-peephole", cl::init(true), cl::desc("Disable the ssa-based peephole optimizer " @@ -33,6 +35,18 @@ namespace { cl::desc("Disable the X86 asm printer, for use " "when profiling the code generator.")); + // FIXME: This should eventually be handled with target triples and + // subtarget support! + cl::opt<X86VectorEnum, true> + SSEArg( + cl::desc("Enable SSE support in the X86 target:"), + cl::values( + clEnumValN(SSE, "sse", " Enable SSE support"), + clEnumValN(SSE2, "sse2", " Enable SSE and SSE2 support"), + clEnumValN(SSE3, "sse3", " Enable SSE, SSE2, and SSE3 support"), + clEnumValEnd), + cl::location(X86Vector), cl::init(NoSSE)); + // Register the target. RegisterTarget<X86TargetMachine> X("x86", " IA-32 (Pentium and above)"); } |