diff options
-rw-r--r-- | lib/Target/X86/X86Instr64bit.td | 4 | ||||
-rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 2 | ||||
-rw-r--r-- | lib/Target/X86/X86RegisterInfo.cpp | 17 | ||||
-rw-r--r-- | test/CodeGen/X86/coalesce-esp.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/X86/ins_subreg_coalesce-3.ll | 2 | ||||
-rw-r--r-- | test/CodeGen/X86/stack-color-with-reg.ll | 2 |
6 files changed, 9 insertions, 20 deletions
diff --git a/lib/Target/X86/X86Instr64bit.td b/lib/Target/X86/X86Instr64bit.td index 94bb1de..a76a056 100644 --- a/lib/Target/X86/X86Instr64bit.td +++ b/lib/Target/X86/X86Instr64bit.td @@ -32,13 +32,13 @@ def i64i8imm : Operand<i64>; def lea64mem : Operand<i64> { let PrintMethod = "printlea64mem"; - let MIOperandInfo = (ops GR64, i8imm, GR64, i32imm); + let MIOperandInfo = (ops GR64, i8imm, GR64_NOSP, i32imm); } def lea64_32mem : Operand<i32> { let PrintMethod = "printlea64_32mem"; let AsmOperandLowerMethod = "lower_lea64_32mem"; - let MIOperandInfo = (ops GR32, i8imm, GR32, i32imm); + let MIOperandInfo = (ops GR32, i8imm, GR32_NOSP, i32imm); } //===----------------------------------------------------------------------===// diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index bbf0cb5..65b1e9d 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -196,7 +196,7 @@ def i8mem_NOREX : Operand<i64> { def lea32mem : Operand<i32> { let PrintMethod = "printlea32mem"; - let MIOperandInfo = (ops GR32, i8imm, GR32, i32imm); + let MIOperandInfo = (ops GR32, i8imm, GR32_NOSP, i32imm); } def SSECC : Operand<i8> { diff --git a/lib/Target/X86/X86RegisterInfo.cpp b/lib/Target/X86/X86RegisterInfo.cpp index 21f4dc5..cae6290 100644 --- a/lib/Target/X86/X86RegisterInfo.cpp +++ b/lib/Target/X86/X86RegisterInfo.cpp @@ -42,11 +42,6 @@ #include "llvm/Support/ErrorHandling.h" using namespace llvm; -static cl::opt<bool> -StrictIndexRegclass("strict-index-regclass", - cl::desc("Use a special register class to avoid letting SP " - "be used as an index")); - X86RegisterInfo::X86RegisterInfo(X86TargetMachine &tm, const TargetInstrInfo &tii) : X86GenRegisterInfo(tm.getSubtarget<X86Subtarget>().is64Bit() ? @@ -274,15 +269,9 @@ getPointerRegClass(unsigned Kind) const { return &X86::GR64RegClass; return &X86::GR32RegClass; case 1: // Normal GRPs except the stack pointer (for encoding reasons). - if (!StrictIndexRegclass) { - if (TM.getSubtarget<X86Subtarget>().is64Bit()) - return &X86::GR64RegClass; - return &X86::GR32RegClass; - } else { - if (TM.getSubtarget<X86Subtarget>().is64Bit()) - return &X86::GR64_NOSPRegClass; - return &X86::GR32_NOSPRegClass; - } + if (TM.getSubtarget<X86Subtarget>().is64Bit()) + return &X86::GR64_NOSPRegClass; + return &X86::GR32_NOSPRegClass; } } diff --git a/test/CodeGen/X86/coalesce-esp.ll b/test/CodeGen/X86/coalesce-esp.ll index 8a15978..ede9b59 100644 --- a/test/CodeGen/X86/coalesce-esp.ll +++ b/test/CodeGen/X86/coalesce-esp.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -strict-index-regclass | grep {movl %esp, %eax} +; RUN: llvm-as < %s | llc | grep {movl %esp, %eax} ; PR4572 ; Don't coalesce with %esp if it would end up putting %esp in diff --git a/test/CodeGen/X86/ins_subreg_coalesce-3.ll b/test/CodeGen/X86/ins_subreg_coalesce-3.ll index 6fd18d6..3213723 100644 --- a/test/CodeGen/X86/ins_subreg_coalesce-3.ll +++ b/test/CodeGen/X86/ins_subreg_coalesce-3.ll @@ -1,4 +1,4 @@ -; RUN: llvm-as < %s | llc -march=x86-64 | grep mov | count 10 +; RUN: llvm-as < %s | llc -march=x86-64 | grep mov | count 11 %struct.COMPOSITE = type { i8, i16, i16 } %struct.FILE = type { i8*, i32, i32, i16, i16, %struct.__sbuf, i32, i8*, i32 (i8*)*, i32 (i8*, i8*, i32)*, i64 (i8*, i64, i32)*, i32 (i8*, i8*, i32)*, %struct.__sbuf, %struct.__sFILEX*, i32, [3 x i8], [1 x i8], %struct.__sbuf, i32, i64 } diff --git a/test/CodeGen/X86/stack-color-with-reg.ll b/test/CodeGen/X86/stack-color-with-reg.ll index 832886b..114e9bf 100644 --- a/test/CodeGen/X86/stack-color-with-reg.ll +++ b/test/CodeGen/X86/stack-color-with-reg.ll @@ -1,7 +1,7 @@ ; RUN: llvm-as < %s | llc -mtriple=x86_64-apple-darwin10 -relocation-model=pic -disable-fp-elim -color-ss-with-regs -stats -info-output-file - > %t ; RUN: grep stackcoloring %t | grep "loads eliminated" ; RUN: grep stackcoloring %t | grep "stack slot refs replaced with reg refs" | grep 5 -; RUN: grep asm-printer %t | grep 180 +; RUN: grep asm-printer %t | grep 182 type { [62 x %struct.Bitvec*] } ; type %0 type { i8* } ; type %1 |