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-rw-r--r--test/CodeGen/X86/fast-cc-pass-in-regs.ll18
1 files changed, 8 insertions, 10 deletions
diff --git a/test/CodeGen/X86/fast-cc-pass-in-regs.ll b/test/CodeGen/X86/fast-cc-pass-in-regs.ll
index ab6248e..721b2d8 100644
--- a/test/CodeGen/X86/fast-cc-pass-in-regs.ll
+++ b/test/CodeGen/X86/fast-cc-pass-in-regs.ll
@@ -1,16 +1,14 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel -enable-x86-fastcc | grep 'mov EDX, 1'
+; RUN: llvm-as < %s | llc -march=x86 -x86-asm-syntax=intel | grep 'mov EDX, 1'
; check that fastcc is passing stuff in regs.
-; Argument reg passing is disabled due to regalloc issues. FIXME!
-; XFAIL: *
+declare x86_fastcallcc i64 @callee(i64)
-declare fastcc long %callee(long)
-
-long %caller() {
- %X = call fastcc long %callee(long 4294967299) ;; (1ULL << 32) + 3
- ret long %X
+define i64 @caller() {
+ %X = callx86_fastcallcc i64 @callee( i64 4294967299 ) ; <i64> [#uses=1]
+ ret i64 %X
}
-fastcc long %caller2(long %X) {
- ret long %X
+define x86_fastcallcc i64 @caller2(i64 %X) {
+ ret i64 %X
}
+