diff options
| -rw-r--r-- | lib/Target/ARM/ARMInstrThumb2.td | 8 | ||||
| -rw-r--r-- | lib/Target/ARM/AsmParser/ARMAsmParser.cpp | 3 | ||||
| -rw-r--r-- | test/MC/ARM/basic-thumb2-instructions.s | 9 |
3 files changed, 14 insertions, 6 deletions
diff --git a/lib/Target/ARM/ARMInstrThumb2.td b/lib/Target/ARM/ARMInstrThumb2.td index 77a3759..376246b 100644 --- a/lib/Target/ARM/ARMInstrThumb2.td +++ b/lib/Target/ARM/ARMInstrThumb2.td @@ -4353,16 +4353,16 @@ def : t2InstAlias<"mvn${p} $Rd, $imm", (t2MOVi rGPR:$Rd, t2_so_imm_not:$imm, pred:$p, zero_reg)>; // Same for AND <--> BIC def : t2InstAlias<"bic${s}${p} $Rd, $Rn, $imm", - (t2ANDri rGPR:$Rd, rGPR:$Rn, so_imm_not:$imm, + (t2ANDri rGPR:$Rd, rGPR:$Rn, t2_so_imm_not:$imm, pred:$p, cc_out:$s)>; def : t2InstAlias<"bic${s}${p} $Rdn, $imm", - (t2ANDri rGPR:$Rdn, rGPR:$Rdn, so_imm_not:$imm, + (t2ANDri rGPR:$Rdn, rGPR:$Rdn, t2_so_imm_not:$imm, pred:$p, cc_out:$s)>; def : t2InstAlias<"and${s}${p} $Rd, $Rn, $imm", - (t2BICri rGPR:$Rd, rGPR:$Rn, so_imm_not:$imm, + (t2BICri rGPR:$Rd, rGPR:$Rn, t2_so_imm_not:$imm, pred:$p, cc_out:$s)>; def : t2InstAlias<"and${s}${p} $Rdn, $imm", - (t2BICri rGPR:$Rdn, rGPR:$Rdn, so_imm_not:$imm, + (t2BICri rGPR:$Rdn, rGPR:$Rdn, t2_so_imm_not:$imm, pred:$p, cc_out:$s)>; // Likewise, "add Rd, t2_so_imm_neg" -> sub def : t2InstAlias<"add${s}${p} $Rd, $Rn, $imm", diff --git a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp index 3d7baf5..d48ece1 100644 --- a/lib/Target/ARM/AsmParser/ARMAsmParser.cpp +++ b/lib/Target/ARM/AsmParser/ARMAsmParser.cpp @@ -946,7 +946,8 @@ public: const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm()); if (!CE) return false; int64_t Value = CE->getValue(); - return ARM_AM::getT2SOImmVal(~Value) != -1; + return ARM_AM::getT2SOImmVal(Value) == -1 && + ARM_AM::getT2SOImmVal(~Value) != -1; } bool isT2SOImmNeg() const { if (!isImm()) return false; diff --git a/test/MC/ARM/basic-thumb2-instructions.s b/test/MC/ARM/basic-thumb2-instructions.s index 61eebe6..86f37b8 100644 --- a/test/MC/ARM/basic-thumb2-instructions.s +++ b/test/MC/ARM/basic-thumb2-instructions.s @@ -152,12 +152,15 @@ _func: ands r3, r12, #0xf and r1, #0xff and r1, r1, #0xff + and r5, r4, #0xffffffff + ands r1, r9, #0xffffffff @ CHECK: and r2, r5, #1044480 @ encoding: [0x05,0xf4,0x7f,0x22] @ CHECK: ands r3, r12, #15 @ encoding: [0x1c,0xf0,0x0f,0x03] @ CHECK: and r1, r1, #255 @ encoding: [0x01,0xf0,0xff,0x01] @ CHECK: and r1, r1, #255 @ encoding: [0x01,0xf0,0xff,0x01] - +@ CHECK: and r5, r4, #4294967295 @ encoding: [0x04,0xf0,0xff,0x35] +@ CHECK: ands r1, r9, #4294967295 @ encoding: [0x19,0xf0,0xff,0x31] @------------------------------------------------------------------------------ @ AND (register) @@ -259,6 +262,8 @@ _func: @ BIC @------------------------------------------------------------------------------ bic r10, r1, #0xf + bic r5, r2, #0xffffffff + bics r11, r10, #0xffffffff bic r12, r3, r6 bic r11, r2, r6, lsl #12 bic r8, r4, r1, lsr #11 @@ -276,6 +281,8 @@ _func: bic r12, r6, ror #29 @ CHECK: bic r10, r1, #15 @ encoding: [0x21,0xf0,0x0f,0x0a] +@ CHECK: bic r5, r2, #4294967295 @ encoding: [0x22,0xf0,0xff,0x35] +@ CHECK: bics r11, r10, #4294967295 @ encoding: [0x3a,0xf0,0xff,0x3b] @ CHECK: bic.w r12, r3, r6 @ encoding: [0x23,0xea,0x06,0x0c] @ CHECK: bic.w r11, r2, r6, lsl #12 @ encoding: [0x22,0xea,0x06,0x3b] @ CHECK: bic.w r8, r4, r1, lsr #11 @ encoding: [0x24,0xea,0xd1,0x28] |