diff options
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 5 | ||||
| -rw-r--r-- | test/CodeGen/X86/tlv-2.ll | 32 |
2 files changed, 34 insertions, 3 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 6e1420c..68fb525 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -6200,11 +6200,10 @@ X86TargetLowering::LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const { // TLSCALL will be codegen'ed as call. Inform MFI that function has calls. MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo(); MFI->setAdjustsStack(true); - + // And our return value (tls address) is in the standard call return value // location. - unsigned Reg = Subtarget->is64Bit() ? X86::RAX : X86::EAX; - return DAG.getCopyFromReg(Chain, DL, Reg, getPointerTy()); + return Chain; } assert(false && diff --git a/test/CodeGen/X86/tlv-2.ll b/test/CodeGen/X86/tlv-2.ll new file mode 100644 index 0000000..883801d --- /dev/null +++ b/test/CodeGen/X86/tlv-2.ll @@ -0,0 +1,32 @@ +; RUN: llc < %s -mtriple x86_64-apple-darwin -O0 | FileCheck %s + +@b = thread_local global i32 5, align 4 +@a = thread_local global i32 0, align 4 +@c = internal thread_local global i32 0, align 4 +@d = internal thread_local global i32 5, align 4 + +define void @foo() nounwind ssp { +entry: + store i32 1, i32* @a, align 4 + ; CHECK: movq _a@TLVP(%rip), %rdi + ; CHECK: callq *(%rdi) + ; CHECK: movl $1, (%rax) + + store i32 2, i32* @b, align 4 + ; CHECK: movq _b@TLVP(%rip), %rdi + ; CHECK: callq *(%rdi) + ; CHECK: movl $2, (%rax) + + store i32 3, i32* @c, align 4 + ; CHECK: movq _c@TLVP(%rip), %rdi + ; CHECK: callq *(%rdi) + ; CHECK: movl $3, (%rax) + + store i32 4, i32* @d, align 4 + ; CHECK: movq _d@TLVP(%rip), %rdi + ; CHECK: callq *(%rdi) + ; CHECK: movl $4, (%rax) + ; CHECK: addq $8, %rsp + + ret void +} |