diff options
| -rw-r--r-- | lib/Target/ARM/ARMISelLowering.cpp | 4 | ||||
| -rw-r--r-- | test/CodeGen/ARM/2011-06-09-TailCallByVal.ll | 6 | ||||
| -rw-r--r-- | test/CodeGen/Generic/2010-11-04-BigByval.ll | 1 |
3 files changed, 4 insertions, 7 deletions
diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp index 697af66..9f31385 100644 --- a/lib/Target/ARM/ARMISelLowering.cpp +++ b/lib/Target/ARM/ARMISelLowering.cpp @@ -1340,10 +1340,12 @@ ARMTargetLowering::LowerCall(SDValue Chain, SDValue Callee, SDValue Src = DAG.getNode(ISD::ADD, dl, getPointerTy(), Arg, SrcOffset); SDValue SizeNode = DAG.getConstant(Flags.getByValSize() - 4*offset, MVT::i32); + // TODO: Disable AlwaysInline when it becomes possible + // to emit a nested call sequence. MemOpChains.push_back(DAG.getMemcpy(Chain, dl, Dst, Src, SizeNode, Flags.getByValAlign(), /*isVolatile=*/false, - /*AlwaysInline=*/false, + /*AlwaysInline=*/true, MachinePointerInfo(0), MachinePointerInfo(0))); diff --git a/test/CodeGen/ARM/2011-06-09-TailCallByVal.ll b/test/CodeGen/ARM/2011-06-09-TailCallByVal.ll index befda6f..7f0f795 100644 --- a/test/CodeGen/ARM/2011-06-09-TailCallByVal.ll +++ b/test/CodeGen/ARM/2011-06-09-TailCallByVal.ll @@ -1,8 +1,4 @@ -; DISABLED: llc < %s -relocation-model=pic -mcpu=cortex-a8 -arm-tail-calls=1 | FileCheck %s -; RUN: false - -; byval is currently unsupported. -; XFAIL: * +; RUN: llc < %s -relocation-model=pic -mcpu=cortex-a8 -arm-tail-calls=1 | FileCheck %s target datalayout = "e-p:32:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-i64:32:32-f32:32:32-f64:32:32-v64:32:64-v128:32:128-a0:0:32-n32" target triple = "thumbv7-apple-darwin10" diff --git a/test/CodeGen/Generic/2010-11-04-BigByval.ll b/test/CodeGen/Generic/2010-11-04-BigByval.ll index ecb354e..df2ca4c 100644 --- a/test/CodeGen/Generic/2010-11-04-BigByval.ll +++ b/test/CodeGen/Generic/2010-11-04-BigByval.ll @@ -1,6 +1,5 @@ ; RUN: llc < %s ; PR7170 -; XFAIL: arm %big = type [131072 x i8] |