diff options
| -rw-r--r-- | lib/AsmParser/Lexer.l | 1 | ||||
| -rw-r--r-- | lib/AsmParser/llvmAsmParser.y | 6 | ||||
| -rw-r--r-- | lib/Bytecode/Reader/InstructionReader.cpp | 6 | ||||
| -rw-r--r-- | lib/Bytecode/Writer/InstructionWriter.cpp | 8 | ||||
| -rw-r--r-- | lib/VMCore/AsmWriter.cpp | 9 | ||||
| -rw-r--r-- | lib/VMCore/Instruction.cpp | 3 | ||||
| -rw-r--r-- | lib/VMCore/Verifier.cpp | 8 |
7 files changed, 30 insertions, 11 deletions
diff --git a/lib/AsmParser/Lexer.l b/lib/AsmParser/Lexer.l index 85852e2..7a56fcc 100644 --- a/lib/AsmParser/Lexer.l +++ b/lib/AsmParser/Lexer.l @@ -221,6 +221,7 @@ call { RET_TOK(OtherOpVal, Call, CALL); } cast { RET_TOK(OtherOpVal, Cast, CAST); } shl { RET_TOK(OtherOpVal, Shl, SHL); } shr { RET_TOK(OtherOpVal, Shr, SHR); } +va_arg { RET_TOK(OtherOpVal, VarArg, VA_ARG); } ret { RET_TOK(TermOpVal, Ret, RET); } br { RET_TOK(TermOpVal, Br, BR); } diff --git a/lib/AsmParser/llvmAsmParser.y b/lib/AsmParser/llvmAsmParser.y index fa57e91..eded8c4 100644 --- a/lib/AsmParser/llvmAsmParser.y +++ b/lib/AsmParser/llvmAsmParser.y @@ -720,7 +720,7 @@ Module *RunVMAsmParser(const std::string &Filename, FILE *F) { // Other Operators %type <OtherOpVal> ShiftOps -%token <OtherOpVal> PHI CALL INVOKE CAST SHL SHR +%token <OtherOpVal> PHI CALL INVOKE CAST SHL SHR VA_ARG %start Module %% @@ -1614,6 +1614,10 @@ InstVal : ArithmeticOps Types ValueRef ',' ValueRef { $$ = new CastInst($2, *$4); delete $4; } + | VA_ARG ResolvedVal ',' Types { + $$ = new VarArgInst($2, *$4); + delete $4; + } | PHI PHIList { const Type *Ty = $2->front().first->getType(); $$ = new PHINode(Ty); diff --git a/lib/Bytecode/Reader/InstructionReader.cpp b/lib/Bytecode/Reader/InstructionReader.cpp index e2c8336..2fc52ad 100644 --- a/lib/Bytecode/Reader/InstructionReader.cpp +++ b/lib/Bytecode/Reader/InstructionReader.cpp @@ -130,11 +130,15 @@ bool BytecodeParser::ParseInstruction(const uchar *&Buf, const uchar *EndBuf, Value *V; switch (Raw.Opcode) { + case Instruction::VarArg: case Instruction::Cast: { V = getValue(Raw.Ty, Raw.Arg1); const Type *Ty = getType(Raw.Arg2); if (V == 0 || Ty == 0) { std::cerr << "Invalid cast!\n"; return true; } - Res = new CastInst(V, Ty); + if (Raw.Opcode == Instruction::Cast) + Res = new CastInst(V, Ty); + else + Res = new VarArgInst(V, Ty); return false; } case Instruction::PHINode: { diff --git a/lib/Bytecode/Writer/InstructionWriter.cpp b/lib/Bytecode/Writer/InstructionWriter.cpp index 587e6d1..63aede1 100644 --- a/lib/Bytecode/Writer/InstructionWriter.cpp +++ b/lib/Bytecode/Writer/InstructionWriter.cpp @@ -35,7 +35,7 @@ static void outputInstructionFormat0(const Instruction *I, output_vbr(Type, Out); // Result type unsigned NumArgs = I->getNumOperands(); - output_vbr(NumArgs + isa<CastInst>(I), Out); + output_vbr(NumArgs + (isa<CastInst>(I) || isa<VarArgInst>(I)), Out); for (unsigned i = 0; i < NumArgs; ++i) { int Slot = Table.getValSlot(I->getOperand(i)); @@ -43,9 +43,9 @@ static void outputInstructionFormat0(const Instruction *I, output_vbr((unsigned)Slot, Out); } - if (isa<CastInst>(I)) { + if (isa<CastInst>(I) || isa<VarArgInst>(I)) { int Slot = Table.getValSlot(I->getType()); - assert(Slot != -1 && "Cast return type unknown?"); + assert(Slot != -1 && "Cast/VarArg return type unknown?"); output_vbr((unsigned)Slot, Out); } @@ -218,7 +218,7 @@ void BytecodeWriter::processInstruction(const Instruction &I) { if (Slot > MaxOpSlot) MaxOpSlot = Slot; // Handle the special case for cast... - if (isa<CastInst>(I)) { + if (isa<CastInst>(I) || isa<VarArgInst>(I)) { // Cast has to encode the destination type as the second argument in the // packet, or else we won't know what type to cast to! Slots[1] = Table.getValSlot(I.getType()); diff --git a/lib/VMCore/AsmWriter.cpp b/lib/VMCore/AsmWriter.cpp index c060a8d..28f26c8 100644 --- a/lib/VMCore/AsmWriter.cpp +++ b/lib/VMCore/AsmWriter.cpp @@ -3,8 +3,7 @@ // This library implements the functionality defined in llvm/Assembly/Writer.h // // Note that these routines must be extremely tolerant of various errors in the -// LLVM code, because of of the primary uses of it is for debugging -// transformations. +// LLVM code, because it can be used for debugging transformations. // //===----------------------------------------------------------------------===// @@ -814,9 +813,13 @@ void AssemblyWriter::printInstruction(const Instruction &I) { writeOperand(AI->getArraySize(), true); } } else if (isa<CastInst>(I)) { - if (Operand) writeOperand(Operand, true); + writeOperand(Operand, true); Out << " to "; printType(I.getType()); + } else if (isa<VarArgInst>(I)) { + writeOperand(Operand, true); + Out << ", "; + printType(I.getType()); } else if (Operand) { // Print the normal way... // PrintAllTypes - Instructions who have operands of all the same type diff --git a/lib/VMCore/Instruction.cpp b/lib/VMCore/Instruction.cpp index 01381fa..ce1423a 100644 --- a/lib/VMCore/Instruction.cpp +++ b/lib/VMCore/Instruction.cpp @@ -91,7 +91,8 @@ const char *Instruction::getOpcodeName(unsigned OpCode) { case Call: return "call"; case Shl: return "shl"; case Shr: return "shr"; - + case VarArg: return "va_arg"; + default: return "<Invalid operator> "; } diff --git a/lib/VMCore/Verifier.cpp b/lib/VMCore/Verifier.cpp index f7bcf50..66ee9de 100644 --- a/lib/VMCore/Verifier.cpp +++ b/lib/VMCore/Verifier.cpp @@ -130,6 +130,7 @@ namespace { // Anonymous namespace for class void visitPHINode(PHINode &PN); void visitBinaryOperator(BinaryOperator &B); void visitShiftInst(ShiftInst &SI); + void visitVarArgInst(VarArgInst &VAI); void visitCallInst(CallInst &CI); void visitGetElementPtrInst(GetElementPtrInst &GEP); void visitLoadInst(LoadInst &LI); @@ -402,7 +403,12 @@ void Verifier::visitShiftInst(ShiftInst &SI) { visitInstruction(SI); } - +void Verifier::visitVarArgInst(VarArgInst &VAI) { + Assert1(VAI.getParent()->getParent()->getFunctionType()->isVarArg(), + "va_arg instruction may only occur in function with variable args!", + &VAI); + visitInstruction(VAI); +} void Verifier::visitGetElementPtrInst(GetElementPtrInst &GEP) { const Type *ElTy = |