aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--lib/Target/X86/AsmParser/X86AsmParser.cpp9
-rw-r--r--test/MC/AsmParser/X86/x86_instructions.s4
2 files changed, 10 insertions, 3 deletions
diff --git a/lib/Target/X86/AsmParser/X86AsmParser.cpp b/lib/Target/X86/AsmParser/X86AsmParser.cpp
index dc86484..f057cd6 100644
--- a/lib/Target/X86/AsmParser/X86AsmParser.cpp
+++ b/lib/Target/X86/AsmParser/X86AsmParser.cpp
@@ -1120,7 +1120,8 @@ MatchAndEmitInstruction(SMLoc IDLoc,
// First, handle aliases that expand to multiple instructions.
// FIXME: This should be replaced with a real .td file alias mechanism.
if (Op->getToken() == "fstsw" || Op->getToken() == "fstcw" ||
- Op->getToken() == "finit") {
+ Op->getToken() == "finit" || Op->getToken() == "fsave" ||
+ Op->getToken() == "fstenv") {
MCInst Inst;
Inst.setOpcode(X86::WAIT);
Out.EmitInstruction(Inst);
@@ -1128,9 +1129,11 @@ MatchAndEmitInstruction(SMLoc IDLoc,
delete Operands[0];
const char *Repl =
StringSwitch<const char*>(Op->getToken())
- .Case("fstsw", "fnstsw")
- .Case("fstcw", "fnstcw")
.Case("finit", "fninit")
+ .Case("fsave", "fnsave")
+ .Case("fstcw", "fnstcw")
+ .Case("fstenv", "fnstenv")
+ .Case("fstsw", "fnstsw")
.Default(0);
assert(Repl && "Unknown wait-prefixed instruction");
Operands[0] = X86Operand::CreateToken(Repl, IDLoc);
diff --git a/test/MC/AsmParser/X86/x86_instructions.s b/test/MC/AsmParser/X86/x86_instructions.s
index 4731a08..a0bc0c9 100644
--- a/test/MC/AsmParser/X86/x86_instructions.s
+++ b/test/MC/AsmParser/X86/x86_instructions.s
@@ -431,6 +431,10 @@ finit
// CHECK: wait
// CHECK: fninit
+fsave 32493
+// CHECK: wait
+// CHECK: fnsave 32493
+
// rdar://8456382 - cvtsd2si support.
cvtsd2si %xmm1, %rax