diff options
| -rw-r--r-- | lib/Target/X86/X86InstrSSE.td | 15 | ||||
| -rw-r--r-- | test/CodeGen/X86/avx-vinsertf128.ll | 8 |
2 files changed, 23 insertions, 0 deletions
diff --git a/lib/Target/X86/X86InstrSSE.td b/lib/Target/X86/X86InstrSSE.td index bd43d0b..fdf119e 100644 --- a/lib/Target/X86/X86InstrSSE.td +++ b/lib/Target/X86/X86InstrSSE.td @@ -157,6 +157,21 @@ def : Pat<(insert_subvector undef, (v8i16 VR128:$src), (i32 0)), def : Pat<(insert_subvector undef, (v16i8 VR128:$src), (i32 0)), (INSERT_SUBREG (v32i8 (IMPLICIT_DEF)), VR128:$src, sub_xmm)>; +// Inserting a 128-bit undef vector into the high part of a 256-bit +// vector should return the 256-bit vector itself. +def : Pat<(insert_subvector (v8i32 VR256:$src), undef, (i32 4)), + (v8i32 VR256:$src)>; +def : Pat<(insert_subvector (v8f32 VR256:$src), undef, (i32 4)), + (v8f32 VR256:$src)>; +def : Pat<(insert_subvector (v4i64 VR256:$src), undef, (i32 4)), + (v4i64 VR256:$src)>; +def : Pat<(insert_subvector (v4f64 VR256:$src), undef, (i32 4)), + (v4f64 VR256:$src)>; +def : Pat<(insert_subvector (v16i16 VR256:$src), undef, (i32 4)), + (v16i16 VR256:$src)>; +def : Pat<(insert_subvector (v32i8 VR256:$src), undef, (i32 4)), + (v32i8 VR256:$src)>; + // Implicitly promote a 32-bit scalar to a vector. def : Pat<(v4f32 (scalar_to_vector FR32:$src)), (INSERT_SUBREG (v4f32 (IMPLICIT_DEF)), FR32:$src, sub_ss)>; diff --git a/test/CodeGen/X86/avx-vinsertf128.ll b/test/CodeGen/X86/avx-vinsertf128.ll index a6f2585..8813a7f 100644 --- a/test/CodeGen/X86/avx-vinsertf128.ll +++ b/test/CodeGen/X86/avx-vinsertf128.ll @@ -36,3 +36,11 @@ allocas: store <4 x i32> %blendAsInt.i503, <4 x i32>* undef, align 4 ret void } + +; CHECK: _C +; CHECK-NOT: vinsertf128 $1 +define <4 x i32> @C(<4 x i32> %v1) nounwind readonly { + %1 = shufflevector <4 x i32> %v1, <4 x i32> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> + %2 = shufflevector <8 x i32> %1, <8 x i32> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> + ret <4 x i32> %2 +} |