diff options
| -rw-r--r-- | lib/Target/Mips/MipsISelLowering.cpp | 35 | ||||
| -rw-r--r-- | test/CodeGen/Mips/internalfunc.ll | 52 |
2 files changed, 79 insertions, 8 deletions
diff --git a/lib/Target/Mips/MipsISelLowering.cpp b/lib/Target/Mips/MipsISelLowering.cpp index 20df9c8..0e193f2 100644 --- a/lib/Target/Mips/MipsISelLowering.cpp +++ b/lib/Target/Mips/MipsISelLowering.cpp @@ -784,7 +784,8 @@ SDValue MipsTargetLowering::LowerGlobalAddress(SDValue Op, false, false, 0); // On functions and global targets not internal linked only // a load from got/GP is necessary for PIC to work. - if (!GV->hasLocalLinkage() || isa<Function>(GV)) + if (!GV->hasInternalLinkage() && + (!GV->hasLocalLinkage() || isa<Function>(GV))) return ResNode; SDValue GALo = DAG.getTargetGlobalAddress(GV, dl, MVT::i32, 0, MipsII::MO_ABS_LO); @@ -1202,10 +1203,19 @@ MipsTargetLowering::LowerCall(SDValue Chain, SDValue Callee, // node so that legalize doesn't hack it. unsigned char OpFlag = IsPIC ? MipsII::MO_GOT_CALL : MipsII::MO_NO_FLAG; bool LoadSymAddr = false; + SDValue CalleeLo; if (GlobalAddressSDNode *G = dyn_cast<GlobalAddressSDNode>(Callee)) { - Callee = DAG.getTargetGlobalAddress(G->getGlobal(), dl, - getPointerTy(), 0, OpFlag); + if (IsPIC && G->getGlobal()->hasInternalLinkage()) { + Callee = DAG.getTargetGlobalAddress(G->getGlobal(), dl, + getPointerTy(), 0,MipsII:: MO_GOT); + CalleeLo = DAG.getTargetGlobalAddress(G->getGlobal(), dl, getPointerTy(), + 0, MipsII::MO_ABS_LO); + } else { + Callee = DAG.getTargetGlobalAddress(G->getGlobal(), dl, + getPointerTy(), 0, OpFlag); + } + LoadSymAddr = true; } else if (ExternalSymbolSDNode *S = dyn_cast<ExternalSymbolSDNode>(Callee)) { @@ -1217,11 +1227,20 @@ MipsTargetLowering::LowerCall(SDValue Chain, SDValue Callee, // Create nodes that load address of callee and copy it to T9 if (IsPIC) { if (LoadSymAddr) { - // load callee address - Callee = DAG.getLoad(MVT::i32, dl, Chain, Callee, - MachinePointerInfo::getGOT(), - false, false, 0); - Chain = Callee.getValue(1); + // Load callee address + SDValue LoadValue = DAG.getLoad(MVT::i32, dl, Chain, Callee, + MachinePointerInfo::getGOT(), + false, false, 0); + + // Use GOT+LO if callee has internal linkage. + if (CalleeLo.getNode()) { + SDValue Lo = DAG.getNode(MipsISD::Lo, dl, MVT::i32, CalleeLo); + Callee = DAG.getNode(ISD::ADD, dl, MVT::i32, LoadValue, Lo); + } else + Callee = LoadValue; + + // Use chain output from LoadValue + Chain = LoadValue.getValue(1); } // copy to T9 diff --git a/test/CodeGen/Mips/internalfunc.ll b/test/CodeGen/Mips/internalfunc.ll new file mode 100644 index 0000000..fdfa01a --- /dev/null +++ b/test/CodeGen/Mips/internalfunc.ll @@ -0,0 +1,52 @@ +; RUN: llc < %s -march=mips | FileCheck %s + +@caller.sf1 = internal unnamed_addr global void (...)* null, align 4 +@gf1 = external global void (...)* +@.str = private unnamed_addr constant [3 x i8] c"f2\00" + +define i32 @main(i32 %argc, i8** nocapture %argv) nounwind { +entry: +; CHECK: lw $[[R0:[0-9]+]], %got(f2)($gp) +; CHECK: addiu $25, $[[R0]], %lo(f2) + tail call fastcc void @f2() + ret i32 0 +} + +define void @caller(i32 %a0, i32 %a1) nounwind { +entry: +; CHECK: lw $[[R1:[0-9]+]], %got(caller.sf1)($gp) +; CHECK: addiu ${{[0-9]+}}, $[[R1]], %lo(caller.sf1) + %tobool = icmp eq i32 %a1, 0 + br i1 %tobool, label %if.end, label %if.then + +if.then: ; preds = %entry + %tmp1 = load void (...)** @caller.sf1, align 4 + tail call void (...)* %tmp1() nounwind + br label %if.end + +if.end: ; preds = %entry, %if.then +; CHECK: lw $[[R2:[0-9]+]], %got(sf2)($gp) +; CHECK: lw $[[R3:[0-9]+]], %got(caller.sf1)($gp) +; CHECK: addiu ${{[0-9]+}}, $[[R2]], %lo(sf2) +; CHECK: addiu ${{[0-9]+}}, $[[R3]], %lo(caller.sf1) + %tobool3 = icmp ne i32 %a0, 0 + %tmp4 = load void (...)** @gf1, align 4 + %cond = select i1 %tobool3, void (...)* %tmp4, void (...)* bitcast (void ()* @sf2 to void (...)*) + store void (...)* %cond, void (...)** @caller.sf1, align 4 + ret void +} + +define internal void @sf2() nounwind { +entry: + %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([3 x i8]* @.str, i32 0, i32 0)) nounwind + ret void +} + +declare i32 @printf(i8* nocapture, ...) nounwind + +define internal fastcc void @f2() nounwind noinline { +entry: + %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([3 x i8]* @.str, i32 0, i32 0)) nounwind + ret void +} + |