diff options
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 20 | ||||
| -rw-r--r-- | test/CodeGen/X86/pr13577.ll | 8 |
2 files changed, 27 insertions, 1 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index af1675b..5dbe633 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -13843,6 +13843,22 @@ static SDValue BoolTestSetCCCombine(SDValue Cmp, X86::CondCode &CC) { return SetCC.getOperand(1); } +static bool IsValidFCMOVCondition(X86::CondCode CC) { + switch (CC) { + default: + return false; + case X86::COND_B: + case X86::COND_BE: + case X86::COND_E: + case X86::COND_P: + case X86::COND_AE: + case X86::COND_A: + case X86::COND_NE: + case X86::COND_NP: + return true; + } +} + /// Optimize X86ISD::CMOV [LHS, RHS, CONDCODE (e.g. X86::COND_NE), CONDVAL] static SDValue PerformCMOVCombine(SDNode *N, SelectionDAG &DAG, TargetLowering::DAGCombinerInfo &DCI) { @@ -13871,7 +13887,9 @@ static SDValue PerformCMOVCombine(SDNode *N, SelectionDAG &DAG, SDValue Flags; Flags = BoolTestSetCCCombine(Cond, CC); - if (Flags.getNode()) { + if (Flags.getNode() && + // Extra check as FCMOV only supports a subset of X86 cond. + (FalseOp.getValueType() != MVT::f80 || IsValidFCMOVCondition(CC))) { SDValue Ops[] = { FalseOp, TrueOp, DAG.getConstant(CC, MVT::i8), Flags }; return DAG.getNode(X86ISD::CMOV, DL, N->getVTList(), diff --git a/test/CodeGen/X86/pr13577.ll b/test/CodeGen/X86/pr13577.ll new file mode 100644 index 0000000..faaec26 --- /dev/null +++ b/test/CodeGen/X86/pr13577.ll @@ -0,0 +1,8 @@ +; RUN: llc < %s -march=x86-64 + +define x86_fp80 @foo(x86_fp80 %a) { + %1 = tail call x86_fp80 @copysignl(x86_fp80 0xK7FFF8000000000000000, x86_fp80 %a) nounwind readnone + ret x86_fp80 %1 +} + +declare x86_fp80 @copysignl(x86_fp80, x86_fp80) nounwind readnone |