diff options
| -rw-r--r-- | lib/Target/Mips/MicroMipsInstrFormats.td | 15 | ||||
| -rw-r--r-- | lib/Target/Mips/MicroMipsInstrInfo.td | 8 | ||||
| -rw-r--r-- | lib/Target/Mips/MipsInstrFormats.td | 2 | ||||
| -rw-r--r-- | lib/Target/Mips/MipsInstrInfo.td | 15 | ||||
| -rw-r--r-- | test/MC/Disassembler/Mips/micromips.txt | 18 | ||||
| -rw-r--r-- | test/MC/Disassembler/Mips/micromips_le.txt | 18 |
6 files changed, 68 insertions, 8 deletions
diff --git a/lib/Target/Mips/MicroMipsInstrFormats.td b/lib/Target/Mips/MicroMipsInstrFormats.td index 4981608..8b7fb81 100644 --- a/lib/Target/Mips/MicroMipsInstrFormats.td +++ b/lib/Target/Mips/MicroMipsInstrFormats.td @@ -275,3 +275,18 @@ class BGEZAL_FM_MM<bits<5> funct> : MMArch { let Inst{20-16} = rs; let Inst{15-0} = offset; } + +class TEQ_FM_MM<bits<6> funct> : MMArch { + bits<5> rs; + bits<5> rt; + bits<4> code_; + + bits<32> Inst; + + let Inst{31-26} = 0x00; + let Inst{25-21} = rt; + let Inst{20-16} = rs; + let Inst{15-12} = code_; + let Inst{11-6} = funct; + let Inst{5-0} = 0x3c; +} diff --git a/lib/Target/Mips/MicroMipsInstrInfo.td b/lib/Target/Mips/MicroMipsInstrInfo.td index 297b838..67fa78c 100644 --- a/lib/Target/Mips/MicroMipsInstrInfo.td +++ b/lib/Target/Mips/MicroMipsInstrInfo.td @@ -201,4 +201,12 @@ let DecoderNamespace = "MicroMips", Predicates = [InMicroMips] in { BGEZAL_FM_MM<0x03>; def BLTZAL_MM : MMRel, BGEZAL_FT<"bltzal", brtarget_mm, GPR32Opnd>, BGEZAL_FM_MM<0x01>; + + /// Trap Instructions + def TEQ_MM : MMRel, TEQ_FT<"teq", GPR32Opnd>, TEQ_FM_MM<0x0>; + def TGE_MM : MMRel, TEQ_FT<"tge", GPR32Opnd>, TEQ_FM_MM<0x08>; + def TGEU_MM : MMRel, TEQ_FT<"tgeu", GPR32Opnd>, TEQ_FM_MM<0x10>; + def TLT_MM : MMRel, TEQ_FT<"tlt", GPR32Opnd>, TEQ_FM_MM<0x20>; + def TLTU_MM : MMRel, TEQ_FT<"tltu", GPR32Opnd>, TEQ_FM_MM<0x28>; + def TNE_MM : MMRel, TEQ_FT<"tne", GPR32Opnd>, TEQ_FM_MM<0x30>; } diff --git a/lib/Target/Mips/MipsInstrFormats.td b/lib/Target/Mips/MipsInstrFormats.td index 8f67b2e..8dbbab2 100644 --- a/lib/Target/Mips/MipsInstrFormats.td +++ b/lib/Target/Mips/MipsInstrFormats.td @@ -454,7 +454,7 @@ class RDHWR_FM { let Inst{5-0} = 0x3b; } -class TEQ_FM<bits<6> funct> { +class TEQ_FM<bits<6> funct> : StdArch { bits<5> rs; bits<5> rt; bits<10> code_; diff --git a/lib/Target/Mips/MipsInstrInfo.td b/lib/Target/Mips/MipsInstrInfo.td index 400bee6..87810bf 100644 --- a/lib/Target/Mips/MipsInstrInfo.td +++ b/lib/Target/Mips/MipsInstrInfo.td @@ -658,7 +658,8 @@ class SYNC_FT : let hasSideEffects = 1 in class TEQ_FT<string opstr, RegisterOperand RO> : InstSE<(outs), (ins RO:$rs, RO:$rt, uimm16:$code_), - !strconcat(opstr, "\t$rs, $rt, $code_"), [], NoItinerary, FrmI>; + !strconcat(opstr, "\t$rs, $rt, $code_"), [], NoItinerary, + FrmI, opstr>; class TEQI_FT<string opstr, RegisterOperand RO> : InstSE<(outs), (ins RO:$rs, uimm16:$imm16), @@ -963,12 +964,12 @@ def SWL : StoreLeftRight<"swl", MipsSWL, GPR32Opnd, IIStore>, LW_FM<0x2a>; def SWR : StoreLeftRight<"swr", MipsSWR, GPR32Opnd, IIStore>, LW_FM<0x2e>; def SYNC : SYNC_FT, SYNC_FM; -def TEQ : TEQ_FT<"teq", GPR32Opnd>, TEQ_FM<0x34>; -def TGE : TEQ_FT<"tge", GPR32Opnd>, TEQ_FM<0x30>; -def TGEU : TEQ_FT<"tgeu", GPR32Opnd>, TEQ_FM<0x31>; -def TLT : TEQ_FT<"tlt", GPR32Opnd>, TEQ_FM<0x32>; -def TLTU : TEQ_FT<"tltu", GPR32Opnd>, TEQ_FM<0x33>; -def TNE : TEQ_FT<"tne", GPR32Opnd>, TEQ_FM<0x36>; +def TEQ : MMRel, TEQ_FT<"teq", GPR32Opnd>, TEQ_FM<0x34>; +def TGE : MMRel, TEQ_FT<"tge", GPR32Opnd>, TEQ_FM<0x30>; +def TGEU : MMRel, TEQ_FT<"tgeu", GPR32Opnd>, TEQ_FM<0x31>; +def TLT : MMRel, TEQ_FT<"tlt", GPR32Opnd>, TEQ_FM<0x32>; +def TLTU : MMRel, TEQ_FT<"tltu", GPR32Opnd>, TEQ_FM<0x33>; +def TNE : MMRel, TEQ_FT<"tne", GPR32Opnd>, TEQ_FM<0x36>; def TEQI : TEQI_FT<"teqi", GPR32Opnd>, TEQI_FM<0xc>; def TGEI : TEQI_FT<"tgei", GPR32Opnd>, TEQI_FM<0x8>; diff --git a/test/MC/Disassembler/Mips/micromips.txt b/test/MC/Disassembler/Mips/micromips.txt index b3de89e..e005e67 100644 --- a/test/MC/Disassembler/Mips/micromips.txt +++ b/test/MC/Disassembler/Mips/micromips.txt @@ -249,3 +249,21 @@ # CHECK: bltz $6, 1332 0x40 0x06 0x02 0x9a + +# CHECK: teq $8, $9, 0 +0x01 0x28 0x00 0x3c + +# CHECK: tge $8, $9, 0 +0x01 0x28 0x02 0x3c + +# CHECK: tgeu $8, $9, 0 +0x01 0x28 0x04 0x3c + +# CHECK: tlt $8, $9, 0 +0x01 0x28 0x08 0x3c + +# CHECK: tltu $8, $9, 0 +0x01 0x28 0x0a 0x3c + +# CHECK: tne $8, $9, 0 +0x01 0x28 0x0c 0x3c diff --git a/test/MC/Disassembler/Mips/micromips_le.txt b/test/MC/Disassembler/Mips/micromips_le.txt index ec9679c..0110cbd 100644 --- a/test/MC/Disassembler/Mips/micromips_le.txt +++ b/test/MC/Disassembler/Mips/micromips_le.txt @@ -249,3 +249,21 @@ # CHECK: bltz $6, 1332 0x06 0x40 0x9a 0x02 + +# CHECK: teq $8, $9, 0 +0x28 0x01 0x3c 0x00 + +# CHECK: tge $8, $9, 0 +0x28 0x01 0x3c 0x02 + +# CHECK: tgeu $8, $9, 0 +0x28 0x01 0x3c 0x04 + +# CHECK: tlt $8, $9, 0 +0x28 0x01 0x3c 0x08 + +# CHECK: tltu $8, $9, 0 +0x28 0x01 0x3c 0x0a + +# CHECK: tne $8, $9, 0 +0x28 0x01 0x3c 0x0c |