diff options
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 9 | ||||
| -rw-r--r-- | test/CodeGen/X86/v4f32-immediate.ll | 5 |
2 files changed, 14 insertions, 0 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index a25710b..23f9e95 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -2495,6 +2495,7 @@ X86TargetLowering::LowerBUILD_VECTOR(SDOperand Op, SelectionDAG &DAG) { unsigned NumZero = 0; unsigned NumNonZero = 0; unsigned NonZeros = 0; + unsigned NumNonZeroImms = 0; std::set<SDOperand> Values; for (unsigned i = 0; i < NumElems; ++i) { SDOperand Elt = Op.getOperand(i); @@ -2505,6 +2506,9 @@ X86TargetLowering::LowerBUILD_VECTOR(SDOperand Op, SelectionDAG &DAG) { else { NonZeros |= (1 << i); NumNonZero++; + if (Elt.getOpcode() == ISD::Constant || + Elt.getOpcode() == ISD::ConstantFP) + NumNonZeroImms++; } } } @@ -2548,6 +2552,11 @@ X86TargetLowering::LowerBUILD_VECTOR(SDOperand Op, SelectionDAG &DAG) { } } + // A vector full of immediates; various special cases are already + // handled, so this is best done with a single constant-pool load. + if (NumNonZero == NumNonZeroImms) + return SDOperand(); + // Let legalizer expand 2-wide build_vectors. if (EVTBits == 64) return SDOperand(); diff --git a/test/CodeGen/X86/v4f32-immediate.ll b/test/CodeGen/X86/v4f32-immediate.ll new file mode 100644 index 0000000..67b5e79 --- /dev/null +++ b/test/CodeGen/X86/v4f32-immediate.ll @@ -0,0 +1,5 @@ +; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse | grep movaps + +define <4 x float> @foo() { + ret <4 x float> <float 3.223542354, float 2.3, float 1.2, float 0.1> +} |