diff options
| -rw-r--r-- | lib/CodeGen/LowerSubregs.cpp | 9 | ||||
| -rw-r--r-- | test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll | 42 |
2 files changed, 48 insertions, 3 deletions
diff --git a/lib/CodeGen/LowerSubregs.cpp b/lib/CodeGen/LowerSubregs.cpp index e9e60a0..358aa16 100644 --- a/lib/CodeGen/LowerSubregs.cpp +++ b/lib/CodeGen/LowerSubregs.cpp @@ -242,9 +242,12 @@ bool LowerSubregsInstructionPass::LowerInsert(MachineInstr *MI) { // No need to insert an identity copy instruction. If the SrcReg was // <undef>, we need to make sure it is alive by inserting an IMPLICIT_DEF if (MI->getOperand(1).isUndef() && !MI->getOperand(0).isDead()) { - BuildMI(*MBB, MI, MI->getDebugLoc(), - TII.get(TargetInstrInfo::IMPLICIT_DEF), DstReg) - .addReg(InsReg, RegState::ImplicitKill); + MachineInstrBuilder MIB = BuildMI(*MBB, MI, MI->getDebugLoc(), + TII.get(TargetInstrInfo::IMPLICIT_DEF), DstReg); + if (MI->getOperand(2).isUndef()) + MIB.addReg(InsReg, RegState::Implicit | RegState::Undef); + else + MIB.addReg(InsReg, RegState::ImplicitKill); } else { DOUT << "subreg: eliminated!\n"; MBB->erase(MI); diff --git a/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll b/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll new file mode 100644 index 0000000..a0fdfd7 --- /dev/null +++ b/test/CodeGen/Thumb2/2009-08-04-SubregLoweringBug2.ll @@ -0,0 +1,42 @@ +; RUN: llvm-as < %s | llc -mtriple=thumbv7-apple-darwin9 -mattr=+neon,+neonfp +; rdar://7117307 + + %struct.Hosp = type { i32, i32, i32, %struct.List, %struct.List, %struct.List, %struct.List } + %struct.List = type { %struct.List*, %struct.Patient*, %struct.List* } + %struct.Patient = type { i32, i32, i32, %struct.Village* } + %struct.Village = type { [4 x %struct.Village*], %struct.Village*, %struct.List, %struct.Hosp, i32, i32 } + +define arm_apcscc %struct.List* @sim(%struct.Village* %village) nounwind { +entry: + br i1 undef, label %bb14, label %bb3.preheader + +bb3.preheader: ; preds = %entry + br label %bb5 + +bb5: ; preds = %bb5, %bb3.preheader + br i1 undef, label %bb11, label %bb5 + +bb11: ; preds = %bb5 + %0 = fmul float undef, 0x41E0000000000000 ; <float> [#uses=1] + %1 = fptosi float %0 to i32 ; <i32> [#uses=1] + store i32 %1, i32* undef, align 4 + br i1 undef, label %generate_patient.exit, label %generate_patient.exit.thread + +generate_patient.exit.thread: ; preds = %bb11 + ret %struct.List* null + +generate_patient.exit: ; preds = %bb11 + br i1 undef, label %bb14, label %bb12 + +bb12: ; preds = %generate_patient.exit + br i1 undef, label %bb.i, label %bb1.i + +bb.i: ; preds = %bb12 + ret %struct.List* null + +bb1.i: ; preds = %bb12 + ret %struct.List* null + +bb14: ; preds = %generate_patient.exit, %entry + ret %struct.List* undef +} |