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-rw-r--r--lib/Target/ARM/ARMCodeEmitter.cpp17
1 files changed, 14 insertions, 3 deletions
diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp
index fbbdb01..ddcf234 100644
--- a/lib/Target/ARM/ARMCodeEmitter.cpp
+++ b/lib/Target/ARM/ARMCodeEmitter.cpp
@@ -165,11 +165,11 @@ namespace {
// are already handled elsewhere. They are placeholders to allow this
// encoder to continue to function until the MC encoder is sufficiently
// far along that this one can be eliminated entirely.
- unsigned NEONThumb2DataIPostEncoder(const MachineInstr &MI, unsigned Val)
+ unsigned NEONThumb2DataIPostEncoder(const MachineInstr &MI, unsigned Val)
const { return 0; }
- unsigned NEONThumb2LoadStorePostEncoder(const MachineInstr &MI,unsigned Val)
+ unsigned NEONThumb2LoadStorePostEncoder(const MachineInstr &MI,unsigned Val)
const { return 0; }
- unsigned NEONThumb2DupPostEncoder(const MachineInstr &MI,unsigned Val)
+ unsigned NEONThumb2DupPostEncoder(const MachineInstr &MI,unsigned Val)
const { return 0; }
unsigned VFPThumb2PostEncoder(const MachineInstr&MI, unsigned Val)
const {
@@ -1851,6 +1851,17 @@ void ARMCodeEmitter::emitMiscInstruction(const MachineInstr &MI) {
// Part of binary is determined by TableGn.
unsigned Binary = getBinaryCodeForInstr(MI);
+ if (Opcode == ARM::FCONSTS) {
+ unsigned Imm = getMachineOpValue(MI, 1);
+ Binary &= ~(0x780000 >> 19);
+ Binary |= (Imm & 0x780000) >> 19;
+ Binary &= ~(0x3800000 >> 7);
+ Binary |= (Imm & 0x3800000) >> 7;
+ Binary &= ~(0x80000000 >> 12);
+ Binary |= (Imm & 0x80000000) >> 12;
+ Binary = VFPThumb2PostEncoder(MI, Binary);
+ }
+
// Set the conditional execution predicate
Binary |= II->getPredicate(&MI) << ARMII::CondShift;