diff options
| -rw-r--r-- | lib/Target/Alpha/AlphaCodeEmitter.cpp | 14 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCCodeEmitter.cpp | 13 | ||||
| -rw-r--r-- | utils/TableGen/CodeEmitterGen.cpp | 3 |
3 files changed, 17 insertions, 13 deletions
diff --git a/lib/Target/Alpha/AlphaCodeEmitter.cpp b/lib/Target/Alpha/AlphaCodeEmitter.cpp index 51a1404..40e1413 100644 --- a/lib/Target/Alpha/AlphaCodeEmitter.cpp +++ b/lib/Target/Alpha/AlphaCodeEmitter.cpp @@ -33,7 +33,8 @@ namespace { /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr /// - int getMachineOpValue(MachineInstr &MI, MachineOperand &MO); + unsigned getMachineOpValue(const MachineInstr &MI, + const MachineOperand &MO); public: static char ID; @@ -55,7 +56,7 @@ namespace { /// CodeEmitterGenerator using TableGen, produces the binary encoding for /// machine instructions. /// - unsigned getBinaryCodeForInstr(MachineInstr &MI); + unsigned getBinaryCodeForInstr(const MachineInstr &MI); private: void emitBasicBlock(MachineBasicBlock &MBB); @@ -87,7 +88,7 @@ void AlphaCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) { MCE.StartMachineBasicBlock(&MBB); for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I) { - MachineInstr &MI = *I; + const MachineInstr &MI = *I; switch(MI.getOpcode()) { default: MCE.emitWordLE(getBinaryCodeForInstr(*I)); @@ -141,10 +142,11 @@ static unsigned getAlphaRegNumber(unsigned Reg) { } } -int AlphaCodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) { +unsigned AlphaCodeEmitter::getMachineOpValue(const MachineInstr &MI, + const MachineOperand &MO) { - int rv = 0; // Return value; defaults to 0 for unhandled cases - // or things that get fixed up later by the JIT. + unsigned rv = 0; // Return value; defaults to 0 for unhandled cases + // or things that get fixed up later by the JIT. if (MO.isRegister()) { rv = getAlphaRegNumber(MO.getReg()); diff --git a/lib/Target/PowerPC/PPCCodeEmitter.cpp b/lib/Target/PowerPC/PPCCodeEmitter.cpp index 2dfdda3..3326cf7 100644 --- a/lib/Target/PowerPC/PPCCodeEmitter.cpp +++ b/lib/Target/PowerPC/PPCCodeEmitter.cpp @@ -38,7 +38,7 @@ namespace { /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr /// - int getMachineOpValue(MachineInstr &MI, MachineOperand &MO); + unsigned getMachineOpValue(const MachineInstr &MI, const MachineOperand &MO); void getAnalysisUsage(AnalysisUsage &AU) const { AU.addRequired<MachineModuleInfo>(); @@ -68,7 +68,7 @@ namespace { /// CodeEmitterGenerator using TableGen, produces the binary encoding for /// machine instructions. /// - unsigned getBinaryCodeForInstr(MachineInstr &MI); + unsigned getBinaryCodeForInstr(const MachineInstr &MI); }; char PPCCodeEmitter::ID = 0; } @@ -100,10 +100,10 @@ void PPCCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) { MCE.StartMachineBasicBlock(&MBB); for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E; ++I){ - MachineInstr &MI = *I; + const MachineInstr &MI = *I; switch (MI.getOpcode()) { default: - MCE.emitWordBE(getBinaryCodeForInstr(*I)); + MCE.emitWordBE(getBinaryCodeForInstr(MI)); break; case TargetInstrInfo::DBG_LABEL: case TargetInstrInfo::EH_LABEL: @@ -121,9 +121,10 @@ void PPCCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) { } } -int PPCCodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) { +unsigned PPCCodeEmitter::getMachineOpValue(const MachineInstr &MI, + const MachineOperand &MO) { - intptr_t rv = 0; // Return value; defaults to 0 for unhandled cases + unsigned rv = 0; // Return value; defaults to 0 for unhandled cases // or things that get fixed up later by the JIT. if (MO.isRegister()) { rv = PPCRegisterInfo::getRegisterNumbering(MO.getReg()); diff --git a/utils/TableGen/CodeEmitterGen.cpp b/utils/TableGen/CodeEmitterGen.cpp index 557a8f4..74268a3 100644 --- a/utils/TableGen/CodeEmitterGen.cpp +++ b/utils/TableGen/CodeEmitterGen.cpp @@ -89,7 +89,7 @@ void CodeEmitterGen::run(std::ostream &o) { // Emit function declaration o << "unsigned " << Target.getName() << "CodeEmitter::" - << "getBinaryCodeForInstr(MachineInstr &MI) {\n"; + << "getBinaryCodeForInstr(const MachineInstr &MI) {\n"; // Emit instruction base values o << " static const unsigned InstBits[] = {\n"; @@ -221,6 +221,7 @@ void CodeEmitterGen::run(std::ostream &o) { o << " const unsigned opcode = MI.getOpcode();\n" << " unsigned Value = InstBits[opcode];\n" << " unsigned op;\n" + << " op = op; // suppress warning\n" << " switch (opcode) {\n"; // Emit each case statement |