diff options
| -rw-r--r-- | lib/Target/ARM/ARMInstrInfo.td | 5 | ||||
| -rw-r--r-- | test/MC/ARM/arm_instructions.s | 4 | ||||
| -rw-r--r-- | test/MC/ARM/simple-encoding.ll | 2 | ||||
| -rw-r--r-- | test/MC/ARM/thumb.s | 3 |
4 files changed, 9 insertions, 5 deletions
diff --git a/lib/Target/ARM/ARMInstrInfo.td b/lib/Target/ARM/ARMInstrInfo.td index 4a142c6..4e4fb2e 100644 --- a/lib/Target/ARM/ARMInstrInfo.td +++ b/lib/Target/ARM/ARMInstrInfo.td @@ -1130,10 +1130,7 @@ let isBarrier = 1, isTerminator = 1 in def TRAP : AXI<(outs), (ins), MiscFrm, NoItinerary, "trap", [(trap)]>, Requires<[IsARM]> { - let Inst{27-25} = 0b011; - let Inst{24-20} = 0b11111; - let Inst{7-5} = 0b111; - let Inst{4} = 0b1; + let Inst = 0xe7ffdefe; } // Address computation and loads and stores in PIC mode. diff --git a/test/MC/ARM/arm_instructions.s b/test/MC/ARM/arm_instructions.s index 5bce41d..a1041fb 100644 --- a/test/MC/ARM/arm_instructions.s +++ b/test/MC/ARM/arm_instructions.s @@ -8,6 +8,10 @@ @ CHECK: encoding: [0x00,0xf0,0x20,0x03] nopeq +@ CHECK: trap +@ CHECK: encoding: [0xfe,0xde,0xff,0xe7] + trap + @ CHECK: bx lr @ CHECK: encoding: [0x1e,0xff,0x2f,0xe1] bx lr diff --git a/test/MC/ARM/simple-encoding.ll b/test/MC/ARM/simple-encoding.ll index f279bda..0877e8e 100644 --- a/test/MC/ARM/simple-encoding.ll +++ b/test/MC/ARM/simple-encoding.ll @@ -12,7 +12,7 @@ declare i32 @llvm.ctlz.i32(i32) define i32 @foo(i32 %a, i32 %b) { ; CHECK: foo -; CHECK: trap @ encoding: [0xf0,0x00,0xf0,0x07] +; CHECK: trap @ encoding: [0xfe,0xde,0xff,0xe7] ; CHECK: bx lr @ encoding: [0x1e,0xff,0x2f,0xe1] tail call void @llvm.trap() diff --git a/test/MC/ARM/thumb.s b/test/MC/ARM/thumb.s index 90e66f8..4b9b5a3 100644 --- a/test/MC/ARM/thumb.s +++ b/test/MC/ARM/thumb.s @@ -6,3 +6,6 @@ @ CHECK: pop {r1, r2, r4} @ encoding: [0x16,0xbc] pop {r1, r2, r4} + +@ CHECK: trap @ encoding: [0xfe,0xde] + trap |