diff options
| -rw-r--r-- | lib/Target/PowerPC/PPCCodeEmitter.cpp | 5 | ||||
| -rw-r--r-- | lib/Target/PowerPC/PPCMCCodeEmitter.cpp | 3 |
2 files changed, 6 insertions, 2 deletions
diff --git a/lib/Target/PowerPC/PPCCodeEmitter.cpp b/lib/Target/PowerPC/PPCCodeEmitter.cpp index 7c5fa7d..42232a0 100644 --- a/lib/Target/PowerPC/PPCCodeEmitter.cpp +++ b/lib/Target/PowerPC/PPCCodeEmitter.cpp @@ -246,7 +246,10 @@ unsigned PPCCodeEmitter::getMachineOpValue(const MachineInstr &MI, const MachineOperand &MO) const { if (MO.isReg()) { - assert(MI.getOpcode() != PPC::MTCRF && MI.getOpcode() != PPC::MFOCRF); + // MTCRF/MFOCRF should go through get_crbitm_encoding for the CR operand. + // The GPR operand should come through here though. + assert((MI.getOpcode() != PPC::MTCRF && MI.getOpcode() != PPC::MFOCRF) || + MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7); return PPCRegisterInfo::getRegisterNumbering(MO.getReg()); } diff --git a/lib/Target/PowerPC/PPCMCCodeEmitter.cpp b/lib/Target/PowerPC/PPCMCCodeEmitter.cpp index ea5275a..b4a1b19 100644 --- a/lib/Target/PowerPC/PPCMCCodeEmitter.cpp +++ b/lib/Target/PowerPC/PPCMCCodeEmitter.cpp @@ -199,7 +199,8 @@ unsigned PPCMCCodeEmitter:: getMachineOpValue(const MCInst &MI, const MCOperand &MO, SmallVectorImpl<MCFixup> &Fixups) const { if (MO.isReg()) { - assert(MI.getOpcode() != PPC::MTCRF && MI.getOpcode() != PPC::MFOCRF); + assert((MI.getOpcode() != PPC::MTCRF && MI.getOpcode() != PPC::MFOCRF) || + MO.getReg() < PPC::CR0 || MO.getReg() > PPC::CR7); return PPCRegisterInfo::getRegisterNumbering(MO.getReg()); } |