diff options
| -rw-r--r-- | lib/CodeGen/SelectionDAG/DAGCombiner.cpp | 30 |
1 files changed, 19 insertions, 11 deletions
diff --git a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index f945892..5dd4376 100644 --- a/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -3415,12 +3415,16 @@ SDNode *DAGCombiner::MatchRotate(SDValue LHS, SDValue RHS, SDLoc DL) { // (*ext (rotr x, (sub 32, y))) SDValue LArgExtOp0 = LHSShiftArg.getOperand(0); EVT LArgVT = LArgExtOp0.getValueType(); - if (LArgVT.getSizeInBits() == SUBC->getAPIntValue()) { - SDValue V = - DAG.getNode(HasROTL ? ISD::ROTL : ISD::ROTR, DL, LArgVT, - LArgExtOp0, HasROTL ? LHSShiftAmt : RHSShiftAmt); - return DAG.getNode(LHSShiftArg.getOpcode(), DL, VT, V).getNode(); - } + bool HasROTRWithLArg = TLI.isOperationLegalOrCustom(ISD::ROTR, LArgVT); + bool HasROTLWithLArg = TLI.isOperationLegalOrCustom(ISD::ROTL, LArgVT); + if (HasROTRWithLArg || HasROTLWithLArg) { + if (LArgVT.getSizeInBits() == SUBC->getAPIntValue()) { + SDValue V = + DAG.getNode(HasROTLWithLArg ? ISD::ROTL : ISD::ROTR, DL, LArgVT, + LArgExtOp0, HasROTL ? LHSShiftAmt : RHSShiftAmt); + return DAG.getNode(LHSShiftArg.getOpcode(), DL, VT, V).getNode(); + } + } } } } else if (LExtOp0.getOpcode() == ISD::SUB && @@ -3444,11 +3448,15 @@ SDNode *DAGCombiner::MatchRotate(SDValue LHS, SDValue RHS, SDLoc DL) { // (*ext (rotr x, (sub 32, y))) SDValue RArgExtOp0 = RHSShiftArg.getOperand(0); EVT RArgVT = RArgExtOp0.getValueType(); - if (RArgVT.getSizeInBits() == SUBC->getAPIntValue()) { - SDValue V = - DAG.getNode(HasROTR ? ISD::ROTR : ISD::ROTL, DL, RArgVT, - RArgExtOp0, HasROTR ? RHSShiftAmt : LHSShiftAmt); - return DAG.getNode(RHSShiftArg.getOpcode(), DL, VT, V).getNode(); + bool HasROTRWithRArg = TLI.isOperationLegalOrCustom(ISD::ROTR, RArgVT); + bool HasROTLWithRArg = TLI.isOperationLegalOrCustom(ISD::ROTL, RArgVT); + if (HasROTRWithRArg || HasROTLWithRArg) { + if (RArgVT.getSizeInBits() == SUBC->getAPIntValue()) { + SDValue V = + DAG.getNode(HasROTRWithRArg ? ISD::ROTR : ISD::ROTL, DL, RArgVT, + RArgExtOp0, HasROTR ? RHSShiftAmt : LHSShiftAmt); + return DAG.getNode(RHSShiftArg.getOpcode(), DL, VT, V).getNode(); + } } } } |