diff options
| -rw-r--r-- | test/CodeGen/ARM/vldlane.ll | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/test/CodeGen/ARM/vldlane.ll b/test/CodeGen/ARM/vldlane.ll index 57e74df..d6ff6b9 100644 --- a/test/CodeGen/ARM/vldlane.ll +++ b/test/CodeGen/ARM/vldlane.ll @@ -27,6 +27,33 @@ define <2 x i32> @vld1lanei32(i32* %A, <2 x i32>* %B) nounwind { ret <2 x i32> %tmp3 } +define <16 x i8> @vld1laneQi8(i8* %A, <16 x i8>* %B) nounwind { +;CHECK: vld1laneQi8: +;CHECK: vld1.8 {d17[1]}, [r0] + %tmp1 = load <16 x i8>* %B + %tmp2 = load i8* %A, align 1 + %tmp3 = insertelement <16 x i8> %tmp1, i8 %tmp2, i32 9 + ret <16 x i8> %tmp3 +} + +define <8 x i16> @vld1laneQi16(i16* %A, <8 x i16>* %B) nounwind { +;CHECK: vld1laneQi16: +;CHECK: vld1.16 {d17[1]}, [r0] + %tmp1 = load <8 x i16>* %B + %tmp2 = load i16* %A, align 2 + %tmp3 = insertelement <8 x i16> %tmp1, i16 %tmp2, i32 5 + ret <8 x i16> %tmp3 +} + +define <4 x i32> @vld1laneQi32(i32* %A, <4 x i32>* %B) nounwind { +;CHECK: vld1laneQi32: +;CHECK: vld1.32 {d17[1]}, [r0] + %tmp1 = load <4 x i32>* %B + %tmp2 = load i32* %A, align 4 + %tmp3 = insertelement <4 x i32> %tmp1, i32 %tmp2, i32 3 + ret <4 x i32> %tmp3 +} + %struct.__neon_int8x8x2_t = type { <8 x i8>, <8 x i8> } %struct.__neon_int16x4x2_t = type { <4 x i16>, <4 x i16> } %struct.__neon_int32x2x2_t = type { <2 x i32>, <2 x i32> } |