diff options
| -rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAG.cpp | 3 | ||||
| -rw-r--r-- | test/CodeGen/X86/or-address.ll | 43 |
2 files changed, 45 insertions, 1 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 13f69c4..5031170 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -1917,7 +1917,8 @@ void SelectionDAG::ComputeMaskedBits(SDValue Op, const APInt &Mask, // Output known-0 bits are known if clear or set in both the low clear bits // common to both LHS & RHS. For example, 8+(X<<3) is known to have the // low 3 bits clear. - APInt Mask2 = APInt::getLowBitsSet(BitWidth, Mask.countTrailingOnes()); + APInt Mask2 = APInt::getLowBitsSet(BitWidth, + BitWidth - Mask.countLeadingZeros()); ComputeMaskedBits(Op.getOperand(0), Mask2, KnownZero2, KnownOne2, Depth+1); assert((KnownZero2 & KnownOne2) == 0 && "Bits known to be one AND zero?"); unsigned KnownZeroOut = KnownZero2.countTrailingOnes(); diff --git a/test/CodeGen/X86/or-address.ll b/test/CodeGen/X86/or-address.ll index df0e1f9..6447680 100644 --- a/test/CodeGen/X86/or-address.ll +++ b/test/CodeGen/X86/or-address.ll @@ -45,3 +45,46 @@ bb: ; preds = %bb, %bb.nph return: ; preds = %bb ret void } + +; CHECK: test1: +; CHECK: movl %{{.*}}, (%rdi,%rcx,4) +; CHECK: movl %{{.*}}, 8(%rdi,%rcx,4) +; CHECK: movl %{{.*}}, 4(%rdi,%rcx,4) +; CHECK: movl %{{.*}}, 12(%rdi,%rcx,4) + +define void @test1(i32* nocapture %array, i32 %r0, i8 signext %k, i8 signext %i0) nounwind { +bb.nph: + br label %for.body + +for.body: ; preds = %for.body, %bb.nph + %j.065 = phi i8 [ 0, %bb.nph ], [ %inc52, %for.body ] ; <i8> [#uses=1] + %i0.addr.064 = phi i8 [ %i0, %bb.nph ], [ %add, %for.body ] ; <i8> [#uses=3] + %k.addr.163 = phi i8 [ %k, %bb.nph ], [ %inc.k.addr.1, %for.body ] ; <i8> [#uses=1] + %cmp5 = icmp slt i8 %i0.addr.064, 4 ; <i1> [#uses=1] + %cond = select i1 %cmp5, i8 %i0.addr.064, i8 0 ; <i8> [#uses=2] + %cmp12 = icmp eq i8 %i0.addr.064, 4 ; <i1> [#uses=1] + %inc = zext i1 %cmp12 to i8 ; <i8> [#uses=1] + %inc.k.addr.1 = add i8 %inc, %k.addr.163 ; <i8> [#uses=2] + %mul = shl i8 %cond, 2 ; <i8> [#uses=1] + %mul22 = shl i8 %inc.k.addr.1, 4 ; <i8> [#uses=1] + %add23 = add i8 %mul22, %mul ; <i8> [#uses=1] + %idxprom = zext i8 %add23 to i64 ; <i64> [#uses=4] + %arrayidx = getelementptr inbounds i32* %array, i64 %idxprom ; <i32*> [#uses=1] + store i32 %r0, i32* %arrayidx + %add3356 = or i64 %idxprom, 2 ; <i64> [#uses=1] + %arrayidx36 = getelementptr inbounds i32* %array, i64 %add3356 ; <i32*> [#uses=1] + store i32 %r0, i32* %arrayidx36 + %add4058 = or i64 %idxprom, 1 ; <i64> [#uses=1] + %arrayidx43 = getelementptr inbounds i32* %array, i64 %add4058 ; <i32*> [#uses=1] + store i32 %r0, i32* %arrayidx43 + %add4760 = or i64 %idxprom, 3 ; <i64> [#uses=1] + %arrayidx50 = getelementptr inbounds i32* %array, i64 %add4760 ; <i32*> [#uses=1] + store i32 %r0, i32* %arrayidx50 + %inc52 = add nsw i8 %j.065, 1 ; <i8> [#uses=2] + %add = add i8 %cond, 1 ; <i8> [#uses=1] + %exitcond = icmp eq i8 %inc52, 32 ; <i1> [#uses=1] + br i1 %exitcond, label %for.end, label %for.body + +for.end: ; preds = %for.body + ret void +} |