diff options
| -rw-r--r-- | lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 35 | ||||
| -rw-r--r-- | test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll | 15 |
2 files changed, 41 insertions, 9 deletions
diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index b5e39a1..f36a120 100644 --- a/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -3347,12 +3347,29 @@ struct AsmOperandInfo : public InlineAsm::ConstraintInfo { /// busy in OutputRegs/InputRegs. void MarkAllocatedRegs(bool isOutReg, bool isInReg, std::set<unsigned> &OutputRegs, - std::set<unsigned> &InputRegs) const { - if (isOutReg) - OutputRegs.insert(AssignedRegs.Regs.begin(), AssignedRegs.Regs.end()); - if (isInReg) - InputRegs.insert(AssignedRegs.Regs.begin(), AssignedRegs.Regs.end()); - } + std::set<unsigned> &InputRegs, + const TargetRegisterInfo &TRI) const { + if (isOutReg) { + for (unsigned i = 0, e = AssignedRegs.Regs.size(); i != e; ++i) + MarkRegAndAliases(AssignedRegs.Regs[i], OutputRegs, TRI); + } + if (isInReg) { + for (unsigned i = 0, e = AssignedRegs.Regs.size(); i != e; ++i) + MarkRegAndAliases(AssignedRegs.Regs[i], InputRegs, TRI); + } + } + +private: + /// MarkRegAndAliases - Mark the specified register and all aliases in the + /// specified set. + static void MarkRegAndAliases(unsigned Reg, std::set<unsigned> &Regs, + const TargetRegisterInfo &TRI) { + assert(TargetRegisterInfo::isPhysicalRegister(Reg) && "Isn't a physreg"); + Regs.insert(Reg); + if (const unsigned *Aliases = TRI.getAliasSet(Reg)) + for (; *Aliases; ++Aliases) + Regs.insert(*Aliases); + } }; } // end anon namespace. @@ -3491,7 +3508,8 @@ GetRegistersForValue(AsmOperandInfo &OpInfo, bool HasEarlyClobber, } } OpInfo.AssignedRegs = RegsForValue(Regs, RegVT, ValueVT); - OpInfo.MarkAllocatedRegs(isOutReg, isInReg, OutputRegs, InputRegs); + const TargetRegisterInfo *TRI = DAG.getTarget().getRegisterInfo(); + OpInfo.MarkAllocatedRegs(isOutReg, isInReg, OutputRegs, InputRegs, *TRI); return; } @@ -3519,7 +3537,6 @@ GetRegistersForValue(AsmOperandInfo &OpInfo, bool HasEarlyClobber, Regs.push_back(RegInfo.createVirtualRegister(PhysReg.second)); OpInfo.AssignedRegs = RegsForValue(Regs, RegVT, ValueVT); - OpInfo.MarkAllocatedRegs(isOutReg, isInReg, OutputRegs, InputRegs); return; } @@ -3571,7 +3588,7 @@ GetRegistersForValue(AsmOperandInfo &OpInfo, bool HasEarlyClobber, OpInfo.AssignedRegs = RegsForValue(Regs, *RC->vt_begin(), OpInfo.ConstraintVT); - OpInfo.MarkAllocatedRegs(isOutReg, isInReg, OutputRegs, InputRegs); + OpInfo.MarkAllocatedRegs(isOutReg, isInReg, OutputRegs, InputRegs, *TRI); return; } } diff --git a/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll b/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll new file mode 100644 index 0000000..94f4e18 --- /dev/null +++ b/test/CodeGen/X86/2008-02-20-InlineAsmClobber.ll @@ -0,0 +1,15 @@ +; RUN: llvm-as < %s | llc | grep {%ecx %ecx} +; PR2078 +; The clobber list says that "ax" is clobbered. Make sure that eax isn't +; allocated to the input/output register. +target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128" +target triple = "i386-apple-darwin8" +@pixels = weak global i32 0 ; <i32*> [#uses=2] + +define void @test() nounwind { +entry: + %tmp = load i32* @pixels, align 4 ; <i32> [#uses=1] + %tmp1 = tail call i32 asm sideeffect "$0 $1", "=r,0,~{dirflag},~{fpsr},~{flags},~{ax}"( i32 %tmp ) nounwind ; <i32> [#uses=1] + store i32 %tmp1, i32* @pixels, align 4 + ret void +} |