diff options
| -rw-r--r-- | lib/Target/X86/X86ISelLowering.cpp | 18 | ||||
| -rw-r--r-- | lib/Target/X86/X86InstrInfo.td | 15 |
2 files changed, 22 insertions, 11 deletions
diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index 704d078..70bfefb 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -7706,10 +7706,22 @@ SDValue X86TargetLowering::LowerMEMBARRIER(SDValue Op, SelectionDAG &DAG) const{ DebugLoc dl = Op.getDebugLoc(); if (!Subtarget->hasSSE2()) { - SDValue Zero = DAG.getConstant(0, + SDValue Chain = Op.getOperand(0); + SDValue Zero = DAG.getConstant(0, Subtarget->is64Bit() ? MVT::i64 : MVT::i32); - return DAG.getNode(X86ISD::MEMBARRIER, dl, MVT::Other, Op.getOperand(0), - Zero); + SDValue Ops[] = { + DAG.getRegister(X86::ESP, MVT::i32), // Base + DAG.getTargetConstant(1, MVT::i8), // Scale + DAG.getRegister(0, MVT::i32), // Index + DAG.getTargetConstant(0, MVT::i32), // Disp + DAG.getRegister(0, MVT::i32), // Segment. + Zero, + Chain + }; + SDNode *Res = + DAG.getMachineNode(X86::OR32mrLocked, dl, MVT::Other, Ops, + array_lengthof(Ops)); + return SDValue(Res, 0); } unsigned isDev = cast<ConstantSDNode>(Op.getOperand(5))->getZExtValue(); diff --git a/lib/Target/X86/X86InstrInfo.td b/lib/Target/X86/X86InstrInfo.td index dff8163..e70840a 100644 --- a/lib/Target/X86/X86InstrInfo.td +++ b/lib/Target/X86/X86InstrInfo.td @@ -3928,18 +3928,17 @@ def EH_RETURN : I<0xC3, RawFrm, (outs), (ins GR32:$addr), // // Memory barriers + +// TODO: Get this to fold the constant into the instruction. +def OR32mrLocked : I<0x09, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$zero), + "lock\n\t" + "or{l}\t{$zero, $dst|$dst, $zero}", + []>, Requires<[In32BitMode]>, LOCK; + let hasSideEffects = 1 in { def Int_MemBarrier : I<0, Pseudo, (outs), (ins), "#MEMBARRIER", [(X86MemBarrier)]>, Requires<[HasSSE2]>; - -// TODO: Get this to fold the constant into the instruction. -let Defs = [ESP] in -def Int_MemBarrierNoSSE : I<0x09, MRM1r, (outs), (ins GR32:$zero), - "lock\n\t" - "or{l}\t{$zero, (%esp)|(%esp), $zero}", - [(X86MemBarrierNoSSE GR32:$zero)]>, - Requires<[In32BitMode]>, LOCK; } // Atomic swap. These are just normal xchg instructions. But since a memory |