diff options
| -rw-r--r-- | include/llvm/CodeGen/FastISel.h | 2 | ||||
| -rw-r--r-- | lib/CodeGen/SelectionDAG/FastISel.cpp | 19 |
2 files changed, 13 insertions, 8 deletions
diff --git a/include/llvm/CodeGen/FastISel.h b/include/llvm/CodeGen/FastISel.h index 085810a..8c23058 100644 --- a/include/llvm/CodeGen/FastISel.h +++ b/include/llvm/CodeGen/FastISel.h @@ -279,7 +279,7 @@ protected: /// the CFG. void FastEmitBranch(MachineBasicBlock *MBB); - void UpdateValueMap(Value* I, unsigned Reg); + unsigned UpdateValueMap(Value* I, unsigned Reg); unsigned createResultReg(const TargetRegisterClass *RC); diff --git a/lib/CodeGen/SelectionDAG/FastISel.cpp b/lib/CodeGen/SelectionDAG/FastISel.cpp index 8467330..7e30053 100644 --- a/lib/CodeGen/SelectionDAG/FastISel.cpp +++ b/lib/CodeGen/SelectionDAG/FastISel.cpp @@ -149,16 +149,21 @@ unsigned FastISel::lookUpRegForValue(Value *V) { /// NOTE: This is only necessary because we might select a block that uses /// a value before we select the block that defines the value. It might be /// possible to fix this by selecting blocks in reverse postorder. -void FastISel::UpdateValueMap(Value* I, unsigned Reg) { +unsigned FastISel::UpdateValueMap(Value* I, unsigned Reg) { if (!isa<Instruction>(I)) { LocalValueMap[I] = Reg; - return; + return Reg; + } + + unsigned &AssignedReg = ValueMap[I]; + if (AssignedReg == 0) + AssignedReg = Reg; + else { + const TargetRegisterClass *RegClass = MRI.getRegClass(Reg); + TII.copyRegToReg(*MBB, MBB->end(), AssignedReg, + Reg, RegClass, RegClass); } - if (!ValueMap.count(I)) - ValueMap[I] = Reg; - else - TII.copyRegToReg(*MBB, MBB->end(), ValueMap[I], - Reg, MRI.getRegClass(Reg), MRI.getRegClass(Reg)); + return AssignedReg; } unsigned FastISel::getRegForGEPIndex(Value *Idx) { |