diff options
-rw-r--r-- | include/llvm/Target/TargetInstrInfo.h | 9 | ||||
-rw-r--r-- | lib/CodeGen/RegAllocSimple.cpp | 3 | ||||
-rw-r--r-- | lib/CodeGen/VirtRegMap.cpp | 4 | ||||
-rw-r--r-- | lib/Target/TargetInstrInfo.cpp | 23 |
4 files changed, 18 insertions, 21 deletions
diff --git a/include/llvm/Target/TargetInstrInfo.h b/include/llvm/Target/TargetInstrInfo.h index 312e6c3..7fb594d 100644 --- a/include/llvm/Target/TargetInstrInfo.h +++ b/include/llvm/Target/TargetInstrInfo.h @@ -139,6 +139,10 @@ public: } return -1; } + + /// findTiedToSrcOperand - Returns the operand that is tied to the specified + /// dest operand. Returns -1 if there isn't one. + int findTiedToSrcOperand(unsigned OpNum) const; }; @@ -257,11 +261,6 @@ public: return get(Opcode).getOperandConstraint(OpNum, Constraint); } - /// findTiedToSrcOperand - Returns the operand that is tied to the specified - /// dest operand. Returns -1 if there isn't one. - int findTiedToSrcOperand(const TargetInstrDescriptor *TID, - unsigned OpNum) const; - /// getDWARF_LABELOpcode - Return the opcode of the target's DWARF_LABEL /// instruction if it has one. This is used by codegen passes that update /// DWARF line number info as they modify the code. diff --git a/lib/CodeGen/RegAllocSimple.cpp b/lib/CodeGen/RegAllocSimple.cpp index 3437b00..0150404 100644 --- a/lib/CodeGen/RegAllocSimple.cpp +++ b/lib/CodeGen/RegAllocSimple.cpp @@ -198,8 +198,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) { unsigned physReg = Virt2PhysRegMap[virtualReg]; if (physReg == 0) { if (op.isDef()) { - int TiedOp = TM->getInstrInfo()-> - findTiedToSrcOperand(MI->getInstrDescriptor(), i); + int TiedOp = MI->getInstrDescriptor()->findTiedToSrcOperand(i); if (TiedOp == -1) { physReg = getFreeReg(virtualReg); } else { diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp index 83543dc..c51d4ab 100644 --- a/lib/CodeGen/VirtRegMap.cpp +++ b/lib/CodeGen/VirtRegMap.cpp @@ -99,7 +99,7 @@ void VirtRegMap::virtFolded(unsigned VirtReg, MachineInstr *OldMI, ModRef MRInfo; const TargetInstrDescriptor *TID = OldMI->getInstrDescriptor(); if (TID->getOperandConstraint(OpNo, TOI::TIED_TO) != -1 || - TII.findTiedToSrcOperand(TID, OpNo) != -1) { + TID->findTiedToSrcOperand(OpNo) != -1) { // Folded a two-address operand. MRInfo = isModRef; } else if (OldMI->getOperand(OpNo).isDef()) { @@ -851,7 +851,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM) { // If this def is part of a two-address operand, make sure to execute // the store from the correct physical register. unsigned PhysReg; - int TiedOp = TII->findTiedToSrcOperand(MI.getInstrDescriptor(), i); + int TiedOp = MI.getInstrDescriptor()->findTiedToSrcOperand(i); if (TiedOp != -1) PhysReg = MI.getOperand(TiedOp).getReg(); else { diff --git a/lib/Target/TargetInstrInfo.cpp b/lib/Target/TargetInstrInfo.cpp index 0e79baa..b9fca8a 100644 --- a/lib/Target/TargetInstrInfo.cpp +++ b/lib/Target/TargetInstrInfo.cpp @@ -17,28 +17,27 @@ #include "llvm/DerivedTypes.h" using namespace llvm; -TargetInstrInfo::TargetInstrInfo(const TargetInstrDescriptor* Desc, - unsigned numOpcodes) - : desc(Desc), NumOpcodes(numOpcodes) { -} - -TargetInstrInfo::~TargetInstrInfo() { -} - /// findTiedToSrcOperand - Returns the operand that is tied to the specified /// dest operand. Returns -1 if there isn't one. -int TargetInstrInfo::findTiedToSrcOperand(const TargetInstrDescriptor *TID, - unsigned OpNum) const { - for (unsigned i = 0, e = TID->numOperands; i != e; ++i) { +int TargetInstrDescriptor::findTiedToSrcOperand(unsigned OpNum) const { + for (unsigned i = 0, e = numOperands; i != e; ++i) { if (i == OpNum) continue; - if (TID->getOperandConstraint(i, TOI::TIED_TO) == (int)OpNum) + if (getOperandConstraint(i, TOI::TIED_TO) == (int)OpNum) return i; } return -1; } +TargetInstrInfo::TargetInstrInfo(const TargetInstrDescriptor* Desc, + unsigned numOpcodes) + : desc(Desc), NumOpcodes(numOpcodes) { +} + +TargetInstrInfo::~TargetInstrInfo() { +} + // commuteInstruction - The default implementation of this method just exchanges // operand 1 and 2. MachineInstr *TargetInstrInfo::commuteInstruction(MachineInstr *MI) const { |