diff options
| -rw-r--r-- | lib/Target/ARM/ARMTargetTransformInfo.cpp | 24 | ||||
| -rw-r--r-- | test/Analysis/CostModel/ARM/select.ll | 23 | ||||
| -rw-r--r-- | test/CodeGen/ARM/vselect_imax.ll | 207 |
3 files changed, 249 insertions, 5 deletions
diff --git a/lib/Target/ARM/ARMTargetTransformInfo.cpp b/lib/Target/ARM/ARMTargetTransformInfo.cpp index eef282e..062d4d3 100644 --- a/lib/Target/ARM/ARMTargetTransformInfo.cpp +++ b/lib/Target/ARM/ARMTargetTransformInfo.cpp @@ -334,6 +334,30 @@ unsigned ARMTTI::getCmpSelInstrCost(unsigned Opcode, Type *ValTy, int ISD = TLI->InstructionOpcodeToISD(Opcode); // On NEON a a vector select gets lowered to vbsl. if (ST->hasNEON() && ValTy->isVectorTy() && ISD == ISD::SELECT) { + // Lowering of some vector selects is currently far from perfect. + static const TypeConversionCostTblEntry<MVT> NEONVectorSelectTbl[] = { + { ISD::SELECT, MVT::v4i1, MVT::v4i8, 2*4 + 2*1 }, + { ISD::SELECT, MVT::v8i1, MVT::v8i8, 2*8 + 1 }, + { ISD::SELECT, MVT::v16i1, MVT::v16i8, 2*16 + 1 }, + { ISD::SELECT, MVT::v4i1, MVT::v4i16, 2*4 + 1 }, + { ISD::SELECT, MVT::v8i1, MVT::v8i16, 2*8 + 1 }, + { ISD::SELECT, MVT::v16i1, MVT::v16i16, 2*16 + 1 + 3*1 + 4*1 }, + { ISD::SELECT, MVT::v8i1, MVT::v8i32, 4*8 + 1*3 + 1*4 + 1*2 }, + { ISD::SELECT, MVT::v16i1, MVT::v16i32, 4*16 + 1*6 + 1*8 + 1*4 }, + { ISD::SELECT, MVT::v4i1, MVT::v4i64, 4*4 + 1*2 + 1 }, + { ISD::SELECT, MVT::v8i1, MVT::v8i64, 50 }, + { ISD::SELECT, MVT::v16i1, MVT::v16i64, 100 } + }; + + EVT SelCondTy = TLI->getValueType(CondTy); + EVT SelValTy = TLI->getValueType(ValTy); + int Idx = ConvertCostTableLookup<MVT>(NEONVectorSelectTbl, + array_lengthof(NEONVectorSelectTbl), + ISD, SelCondTy.getSimpleVT(), + SelValTy.getSimpleVT()); + if (Idx != -1) + return NEONVectorSelectTbl[Idx].Cost; + std::pair<unsigned, MVT> LT = TLI->getTypeLegalizationCost(ValTy); return LT.first; } diff --git a/test/Analysis/CostModel/ARM/select.ll b/test/Analysis/CostModel/ARM/select.ll index 96afccf..23cee9a 100644 --- a/test/Analysis/CostModel/ARM/select.ll +++ b/test/Analysis/CostModel/ARM/select.ll @@ -21,26 +21,39 @@ define void @casts() { ; Vector values ; CHECK: cost of 1 {{.*}} select %v7 = select <2 x i1> undef, <2 x i8> undef, <2 x i8> undef - ; CHECK: cost of 1 {{.*}} select + ; CHECK: cost of 10 {{.*}} select %v8 = select <4 x i1> undef, <4 x i8> undef, <4 x i8> undef - ; CHECK: cost of 1 {{.*}} select + ; CHECK: cost of 17 {{.*}} select %v9 = select <8 x i1> undef, <8 x i8> undef, <8 x i8> undef - ; CHECK: cost of 1 {{.*}} select + ; CHECK: cost of 33 {{.*}} select %v10 = select <16 x i1> undef, <16 x i8> undef, <16 x i8> undef ; CHECK: cost of 1 {{.*}} select %v11 = select <2 x i1> undef, <2 x i16> undef, <2 x i16> undef - ; CHECK: cost of 1 {{.*}} select + ; CHECK: cost of 9 {{.*}} select %v12 = select <4 x i1> undef, <4 x i16> undef, <4 x i16> undef - ; CHECK: cost of 1 {{.*}} select + ; CHECK: cost of 17 {{.*}} select %v13 = select <8 x i1> undef, <8 x i16> undef, <8 x i16> undef + ; CHECK: cost of 40 {{.*}} select + %v13b = select <16 x i1> undef, <16 x i16> undef, <16 x i16> undef ; CHECK: cost of 1 {{.*}} select %v14 = select <2 x i1> undef, <2 x i32> undef, <2 x i32> undef ; CHECK: cost of 1 {{.*}} select %v15 = select <4 x i1> undef, <4 x i32> undef, <4 x i32> undef + ; CHECK: cost of 41 {{.*}} select + %v15b = select <8 x i1> undef, <8 x i32> undef, <8 x i32> undef + ; CHECK: cost of 82 {{.*}} select + %v15c = select <16 x i1> undef, <16 x i32> undef, <16 x i32> undef + ; CHECK: cost of 1 {{.*}} select %v16 = select <2 x i1> undef, <2 x i64> undef, <2 x i64> undef + ; CHECK: cost of 19 {{.*}} select + %v16a = select <4 x i1> undef, <4 x i64> undef, <4 x i64> undef + ; CHECK: cost of 50 {{.*}} select + %v16b = select <8 x i1> undef, <8 x i64> undef, <8 x i64> undef + ; CHECK: cost of 100 {{.*}} select + %v16c = select <16 x i1> undef, <16 x i64> undef, <16 x i64> undef ; CHECK: cost of 1 {{.*}} select %v17 = select <2 x i1> undef, <2 x float> undef, <2 x float> undef diff --git a/test/CodeGen/ARM/vselect_imax.ll b/test/CodeGen/ARM/vselect_imax.ll index f599404..ce336cd 100644 --- a/test/CodeGen/ARM/vselect_imax.ll +++ b/test/CodeGen/ARM/vselect_imax.ll @@ -10,3 +10,210 @@ define void @vmax_v4i32(<4 x i32>* %m, <4 x i32> %a, <4 x i32> %b) { ret void } +; We adjusted the cost model of the following selects. When we improve code +; lowering we also need to adjust the cost. +; RUN: opt < %s -cost-model -analyze -mtriple=thumbv7-apple-ios6.0.0 -march=arm -mcpu=cortex-a8 | FileCheck %s --check-prefix=COST +%T0_3 = type <4 x i8> +%T1_3 = type <4 x i1> +; CHECK: func_blend3: +define void @func_blend3(%T0_3* %loadaddr, %T0_3* %loadaddr2, + %T1_3* %blend, %T0_3* %storeaddr) { +; CHECK: strh +; CHECK: strh +; CHECK: strh +; CHECK: strh +; CHECK: vldr + %v0 = load %T0_3* %loadaddr + %v1 = load %T0_3* %loadaddr2 + %c = load %T1_3* %blend +; COST: func_blend3 +; COST: cost of 10 {{.*}} select + %r = select %T1_3 %c, %T0_3 %v0, %T0_3 %v1 + store %T0_3 %r, %T0_3* %storeaddr + ret void +} +%T0_4 = type <8 x i8> +%T1_4 = type <8 x i1> +; CHECK: func_blend4: +define void @func_blend4(%T0_4* %loadaddr, %T0_4* %loadaddr2, + %T1_4* %blend, %T0_4* %storeaddr) { + %v0 = load %T0_4* %loadaddr + %v1 = load %T0_4* %loadaddr2 + %c = load %T1_4* %blend +; check: strb +; check: strb +; check: strb +; check: strb +; check: vldr +; COST: func_blend4 +; COST: cost of 17 {{.*}} select + %r = select %T1_4 %c, %T0_4 %v0, %T0_4 %v1 + store %T0_4 %r, %T0_4* %storeaddr + ret void +} +%T0_5 = type <16 x i8> +%T1_5 = type <16 x i1> +; CHECK: func_blend5: +define void @func_blend5(%T0_5* %loadaddr, %T0_5* %loadaddr2, + %T1_5* %blend, %T0_5* %storeaddr) { + %v0 = load %T0_5* %loadaddr + %v1 = load %T0_5* %loadaddr2 + %c = load %T1_5* %blend +; CHECK: strb +; CHECK: strb +; CHECK: strb +; CHECK: strb +; CHECK: vld +; COST: func_blend5 +; COST: cost of 33 {{.*}} select + %r = select %T1_5 %c, %T0_5 %v0, %T0_5 %v1 + store %T0_5 %r, %T0_5* %storeaddr + ret void +} +%T0_8 = type <4 x i16> +%T1_8 = type <4 x i1> +; CHECK: func_blend8: +define void @func_blend8(%T0_8* %loadaddr, %T0_8* %loadaddr2, + %T1_8* %blend, %T0_8* %storeaddr) { + %v0 = load %T0_8* %loadaddr + %v1 = load %T0_8* %loadaddr2 + %c = load %T1_8* %blend +; CHECK: strh +; CHECK: strh +; CHECK: strh +; CHECK: strh +; CHECK: vld +; COST: func_blend8 +; COST: cost of 9 {{.*}} select + %r = select %T1_8 %c, %T0_8 %v0, %T0_8 %v1 + store %T0_8 %r, %T0_8* %storeaddr + ret void +} +%T0_9 = type <8 x i16> +%T1_9 = type <8 x i1> +; CHECK: func_blend9: +define void @func_blend9(%T0_9* %loadaddr, %T0_9* %loadaddr2, + %T1_9* %blend, %T0_9* %storeaddr) { + %v0 = load %T0_9* %loadaddr + %v1 = load %T0_9* %loadaddr2 + %c = load %T1_9* %blend +; CHECK: strh +; CHECK: strh +; CHECK: strh +; CHECK: strh +; CHECK: vld +; COST: func_blend9 +; COST: cost of 17 {{.*}} select + %r = select %T1_9 %c, %T0_9 %v0, %T0_9 %v1 + store %T0_9 %r, %T0_9* %storeaddr + ret void +} +%T0_10 = type <16 x i16> +%T1_10 = type <16 x i1> +; CHECK: func_blend10: +define void @func_blend10(%T0_10* %loadaddr, %T0_10* %loadaddr2, + %T1_10* %blend, %T0_10* %storeaddr) { + %v0 = load %T0_10* %loadaddr + %v1 = load %T0_10* %loadaddr2 + %c = load %T1_10* %blend +; CHECK: strb +; CHECK: strb +; CHECK: strb +; CHECK: strb +; CHECK: vld +; COST: func_blend10 +; COST: cost of 40 {{.*}} select + %r = select %T1_10 %c, %T0_10 %v0, %T0_10 %v1 + store %T0_10 %r, %T0_10* %storeaddr + ret void +} +%T0_14 = type <8 x i32> +%T1_14 = type <8 x i1> +; CHECK: func_blend14: +define void @func_blend14(%T0_14* %loadaddr, %T0_14* %loadaddr2, + %T1_14* %blend, %T0_14* %storeaddr) { + %v0 = load %T0_14* %loadaddr + %v1 = load %T0_14* %loadaddr2 + %c = load %T1_14* %blend +; CHECK: strb +; CHECK: strb +; CHECK: strb +; CHECK: strb +; COST: func_blend14 +; COST: cost of 41 {{.*}} select + %r = select %T1_14 %c, %T0_14 %v0, %T0_14 %v1 + store %T0_14 %r, %T0_14* %storeaddr + ret void +} +%T0_15 = type <16 x i32> +%T1_15 = type <16 x i1> +; CHECK: func_blend15: +define void @func_blend15(%T0_15* %loadaddr, %T0_15* %loadaddr2, + %T1_15* %blend, %T0_15* %storeaddr) { + %v0 = load %T0_15* %loadaddr + %v1 = load %T0_15* %loadaddr2 + %c = load %T1_15* %blend +; CHECK: strb +; CHECK: strb +; CHECK: strb +; CHECK: strb +; COST: func_blend15 +; COST: cost of 82 {{.*}} select + %r = select %T1_15 %c, %T0_15 %v0, %T0_15 %v1 + store %T0_15 %r, %T0_15* %storeaddr + ret void +} +%T0_18 = type <4 x i64> +%T1_18 = type <4 x i1> +; CHECK: func_blend18: +define void @func_blend18(%T0_18* %loadaddr, %T0_18* %loadaddr2, + %T1_18* %blend, %T0_18* %storeaddr) { + %v0 = load %T0_18* %loadaddr + %v1 = load %T0_18* %loadaddr2 + %c = load %T1_18* %blend +; CHECK: strh +; CHECK: strh +; CHECK: strh +; CHECK: strh +; COST: func_blend18 +; COST: cost of 19 {{.*}} select + %r = select %T1_18 %c, %T0_18 %v0, %T0_18 %v1 + store %T0_18 %r, %T0_18* %storeaddr + ret void +} +%T0_19 = type <8 x i64> +%T1_19 = type <8 x i1> +; CHECK: func_blend19: +define void @func_blend19(%T0_19* %loadaddr, %T0_19* %loadaddr2, + %T1_19* %blend, %T0_19* %storeaddr) { + %v0 = load %T0_19* %loadaddr + %v1 = load %T0_19* %loadaddr2 + %c = load %T1_19* %blend +; CHECK: strb +; CHECK: strb +; CHECK: strb +; CHECK: strb +; COST: func_blend19 +; COST: cost of 50 {{.*}} select + %r = select %T1_19 %c, %T0_19 %v0, %T0_19 %v1 + store %T0_19 %r, %T0_19* %storeaddr + ret void +} +%T0_20 = type <16 x i64> +%T1_20 = type <16 x i1> +; CHECK: func_blend20: +define void @func_blend20(%T0_20* %loadaddr, %T0_20* %loadaddr2, + %T1_20* %blend, %T0_20* %storeaddr) { + %v0 = load %T0_20* %loadaddr + %v1 = load %T0_20* %loadaddr2 + %c = load %T1_20* %blend +; CHECK: strb +; CHECK: strb +; CHECK: strb +; CHECK: strb +; COST: func_blend20 +; COST: cost of 100 {{.*}} select + %r = select %T1_20 %c, %T0_20 %v0, %T0_20 %v1 + store %T0_20 %r, %T0_20* %storeaddr + ret void +} |